Datasheet
OPA836
OPA2836
www.ti.com
SLOS712E –JANUARY 2011–REVISED SEPTEMBER 2013
SPECIFICATIONS: V
S
= 5 V
Test conditions unless otherwise noted: V
S+
= +5 V, V
S–
= 0 V, V
OUT
= 2 V
PP
, R
F
= 0 Ω, R
L
= 1 kΩ, G = 1 V/V, Input and
Output Referenced to mid-supply. T
A
= 25°C. Unless otherwise noted.
TEST
PARAMETER CONDITIONS MIN TYP MAX UNITS
LEVEL
(1)
DC PERFORMANCE
Open-loop voltage gain (A
OL
) 100 122 dB A
T
A
= 25°C ±65 ±400 A
T
A
= 0°C to 70°C ±685
Input referred offset voltage µV
T
A
= –40°C to 85°C ±765 B
T
A
= –40°C to 125°C ±1080
T
A
= 0°C to 70°C ±1.05 ±6.3
Input offset voltage drift
(2)
T
A
= –40°C to 85°C ±1 ±6.1 µV/°C B
T
A
= –40°C to 125°C ±1.1 ±6.8
T
A
= 25°C 300 650 1000 A
T
A
= 0°C to 70°C 190 1400
Input bias current nA
T
A
= –40°C to 85°C 120 1550 B
T
A
= –40°C to 125°C 120 1850
T
A
= 0°C to 70°C ±0.34 ±2
Input bias current drift
(2)
T
A
= –40°C to 85°C ±0.34 ±2 nA/°C B
T
A
= –40°C to 125°C ±0.38 ±2.3
T
A
= 25°C ±30 ±180 A
T
A
= 0°C to 70°C ±30 ±200
Input offset current nA
T
A
= –40°C to 85°C ±30 ±215 B
T
A
= –40°C to 125°C ±30 ±250
T
A
= 0°C to 70°C ±80 ±480
Input offset current drift
(2)
T
A
= –40°C to 85°C ±100 ±600 pA/°C B
T
A
= –40°C to 125°C ±110 ±660
INPUT
T
A
= 25°C, <3dB degradation in CMRR limit –0.2 0 V A
Common-mode input range low
T
A
= –40°C to 125°C, <3dB degradation in CMRR
–0.2 0 V B
limit
T
A
= 25°C, <3dB degradation in CMRR limit 3.8 3.9 V A
Common-mode input range high
T
A
= –40°C to 125°C, <3dB degradation in CMRR
3.8 3.9 V B
limit
Input linear operating voltage range T
A
= 25°C, <6dB degradation in THD -0.3 to V C
4.05
Common-mode rejection ratio 94 116 dB A
Input impedance common mode 200||1.2 kΩ || pF C
Input impedance differential mode 200||1 kΩ || pF C
OUTPUT
T
A
= 25°C, G = 0.15 0.2 V A
Linear output voltage low
T
A
= –40°C to 125°C, G = 5 0.15 0.2 V B
T
A
= 25°C, G = 5 4.75 4.8 V A
Linear output voltage high
T
A
= –40°C to 125°C, G = 5 4.75 4.8 V B
Output saturation voltage, High / Low T
A
= 25°C, G = 5 100/50 mV C
T
A
= 25°C ±40 ±50 mA A
Linear output current drive
T
A
= –40°C to 125°C ±40 ±50 mA B
(1) Test levels (all values set by characterization and simulation): (A) 100% tested at 25°C; over temperature limits by characterization and
simulation. (B) Not tested in production; limits set by characterization and simulation. (C) Typical value only for information.
(2) Input Offset Voltage Drift, Input Bias Current Drift, and Input Offset Current Drift are average values calculated by taking data at the end
points, computing the difference, and dividing by the temperature range.
Copyright © 2011–2013, Texas Instruments Incorporated Submit Documentation Feedback 7
Product Folder Links: OPA836 OPA2836