Datasheet

V
OUT+
R
O
+
V
OUT-
2R2R
OPA 835
+
R
F
R
G
V
REF
V
REF
V
IN
R
1
V
SIG
V
REF
-G x V
SIG
V
REF
V
REF
G x V
SIG
OPA 835
R
O
F
IN REF IN REF
OUT+ OUT-
G
R
V = G x V + V and V = -G x V + V Where: G = 1 +
R
R
G
V
IN
OPA 835
V
SIG
V
REF
V
REF
V
S+
V
S-
R
F
V
OUT
GV
SIG
V
REF
OPA835
OPA2835
SLOS713E –JANUARY 2011–REVISED JULY 2013 www.ti.com
Figure 54. Inverting Amplifier
Attenuators
The non-inverting circuit of Figure 53 has minimum gain of 1. To implement attenuation, a resistor divider can be
placed in series with the positive input, and the amplifier set for gain of 1 by shorting V
OUT
to V
IN-
and removing
R
G
. Since the op amp input is high impedance, the attenuation is set by the resistor divider.
The inverting circuit of Figure 54 can be used as an attenuator by making R
G
larger than R
F
. The attenuation is
simply the resistor ratio. For example a 10:1 attenuator can be implemented with R
F
= 2 kΩ and R
G
= 20 kΩ.
Single Ended to Differential Amplifier
Figure 55 shows an amplifier circuit that is used to convert single-ended signals to differential, and provides gain
and level shifting. This circuit can be used for converting signals to differential in applications like line drivers for
CAT 5 cabling or driving differential input SAR and ΔΣ ADCs.
By setting V
IN
= V
REF
+ V
SIG
, then
(3)
The differential signal gain of the circuit is 2x G, and V
REF
provides a reference around which the output signal
swings. The differential output signal is in-phase with the single ended input signal.
Figure 55. Single Ended to Differential Amplifier
Line termination on the output can be accomplished with resistors R
O
. The impedance seen differential from the
line will be 2x R
O
. For example if 100 Ω CAT 5 cable is used with double termination, the amplifier is typically set
for a differential gain of 2 V/V (6 dB) with R
F
= 0 Ω (short) R
G
= ∞Ω (open), 2R = 2 kΩ, R1 = 0 Ω, R = 1 kΩ to
balance the input bias currents, and R
O
= 49.9 Ω for output line termination. This configuration is shown in
Figure 56.
For driving a differential input ADC the situation is similar, but the output resistors, R
O
, are typically chosen along
with a capacitor across the ADC input for optimum filtering and settling time performance.
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