Datasheet
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SBOS266E − JUNE 2003 − REVISED AUGUST 2008
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16
SINGLE-SUPPLY ADC INTERFACE
The circuit shown in Figure 6 uses the OPA832 as a dif-
ferential driver followed by an RC filter. In this circuit, the
single-ended to differential conversion is realized by a
1:1 transformer driving the noninverting inputs of the
two OPA832s. The common-mode level (CML) of the
ADS5203 is reduced to the appropriate input level of
0.885V by the network divider composed of R
1
and the
CML output impedance, and connected to the trans-
former center tap, biasing the OPA832s. This input bias
voltage is then amplified to provide the correct com-
mon-mode voltage to the input of the ADC. Using only
25.1mW power (3.8mA × 2 amplifiers × 3.3V), this con-
figuration (amplifier + ADC) provides greater than 59dB
SNR and 70dB SFDR to 2MHz, with all the components
running on a low +3.3V supply.
R
F
400
Ω
R
G
400
Ω
C
15pF
C
1
0.1
µ
F
IN
IN
CML
1/2
ADS5203
10−Bit
40MSPS
OPA832
OPA832
+3.3V
+3.3V
+3.3V
R
F
400
Ω
R
G
400
Ω
R
I
1.91k
Ω
R
S
50
Ω
R
S
50
Ω
R
T
20
Ω
R
T
20
Ω
R
M
50
Ω
1:1
2.3k
Ω
Output
Impedance
V
IN
50
Ω
Source
V
CM
=0.885V
Figure 6. Low-Power, Single-Supply ADC Driver