Datasheet

OPA698
16
SBOS258D
www.ti.com
WIDEBAND INVERTING OPERATION
Operating the OPA698 as an inverting amplifier has several
benefits and is particularly useful when a matched 50
source and input impedance are required. Figure 3 shows
the inverting gain of 2 circuit used as the basis of the
inverting mode typical characteristics.
As the required R
G
resistor approaches 50 at higher gains,
the bandwidth for the circuit in Figure 3 will far exceed the
bandwidth at that same gain magnitude for the noninverting
circuit of Figure 1. This occurs due to the lower noise gain for
the circuit of Figure 3 when the 50 source impedance is
included in the analysis. For instance, at a signal gain of 8
(R
G
= 50, R
M
= open, R
F
= 402) the noise gain for the
circuit of Figure 3 will be 1 + 402/(50 + 50) = 5 due to
the addition of the 50 source in the noise gain equation.
This approach gives considerably higher bandwidth than the
noninverting gain of +8. Using the 250MHz gain bandwidth
product for the OPA698, an inverting gain of 8 from a 50
source to a 50 R
G
will give 52MHz bandwidth, whereas
the noninverting gain of +8 will give 28MHz, as shown in
Figure 4.
0 1 10k 100k
Frequency (MHz)
Gain (dB)
21
18
15
12
9
6
G = +8
G = 8
OPA698
V
S
= +5V
4
2
3
7
5
8
6
V
S
= +5V
+3.5V
+1.5V
V
IN
REFB
REFT
IN
0.1µF
100pF
V
H
= +3.6V
V
L
= +1.4V
0.1µF
0.1µF
0.1µF
402
24.9
562
102
402
715
715
102
562
ADS822
10-Bit
40MSPS
10-Bit
Data
V
S
= +5V
INT/EXT
RSEL +V
S
GND
LIMITED OUTPUT, ADC INPUT DRIVER
Figure 5 shows a simple ADC driver that operates on a single
supply, and gives excellent distortion performance. The limit
voltages track the input range of the converter, completely
protecting against input overdrive. Note that the limiting
voltages have been set 100mV above/below the correspond-
ing reference voltage from the converter.
OPA698
5V
V
I
2V
+5V +2V
R
M
66.5
402
200
500
0.1µF
R
T
147
V
H
V
L
V
O
50Source
In the inverting case, only the feedback resistor appears as
part of the total output load in parallel with the actual load.
For a 500 load used in the typical characteristics, this gives
a total load of 222 in this inverting configuration. The gain
resistor is set to get the desired gain (in this case, 200 for
a gain of 2) while an additional input resistor (R
M
) can be
used to set the total input impedance equal to the source, if
desired. In this case, R
M
= 66.5 in parallel with the 200
gain setting resistor gives a matched input impedance of
50. This matching is only needed when the input needs to
be matched to a source impedance, as in the characteriza-
tion testing done using the circuit of Figure 3.
For bias current-cancellation matching, the noninverting in-
put requires a 147 resistor to ground. The calculation for
this resistor includes a DC-coupled 50 source impedance
along with R
G
and R
M
. Although this resistor will provide
cancellation for the bias current, it must be well-decoupled
(0.1µF in Figure 3) to filter the noise contribution of the
resistor and the input current noise.
FIGURE 3. Inverting G = 2 Specifications and Test Circuit.
FIGURE 4. G = +8 and 8 Frequency Response.
FIGURE 5. Single Supply, Limiting ADC Input Driver.