Datasheet

OPA695
14
SBOS293G
www.ti.com
FIGURE 3. AC-Coupled, G = +8V/V, Single-Supply Specifications and Test Circuit.
FIGURE 4. AC-Coupled, G = –8V/V, Single-Supply Specifications and Test Circuit.
Figure 3 shows the AC-coupled, single +5V supply, gain of
+8V/V circuit configuration used as a basis for the +5V only
Specifications and Typical Characteristic curves. The key
requirement for broadband single-supply operation is to
maintain input and output signal swings within the useable
voltage ranges at both the input and the output. The circuit
of Figure 3 establishes an input midpoint bias using a simple
resistive divider from the +5V supply (two 806Ω resistors) to
the noninverting input. The input signal is then AC-coupled
into this midpoint voltage bias. The input voltage can swing
to within 1.6V of either supply pin, giving a 1.8V
PP
input
signal range centered between the supply pins. The input
impedance matching resistor (57.6Ω) used in Figure 3 is
adjusted to give a 50Ω input match when the parallel combi-
nation of the biasing divider network is included. The gain
resistor (R
G
) is AC-coupled, giving the circuit a DC gain of +1.
This puts the input DC bias voltage (2.5V) on the output as
well. The feedback resistor value has been adjusted from the
bipolar supply condition to re-optimize for a flat frequency
response in +5V only, gain of +8 operation (see Setting
Resistor Values to Optimize Bandwidth). On a single +5V
supply, the output voltage can swing to within 1.0V of either
supply pin while delivering more than 90mA output current
giving 3V output swing into 100Ω (7dBm maximum at the
matched load). The circuit of Figure 3 shows a blocking
capacitor driving into a 50Ω output resistor then into a 50Ω
load. Alternatively, the blocking capacitor could be removed
with the load tied to a supply midpoint or to ground if the DC
current required by this grounded load is acceptable.
Figure 4 shows the AC-coupled, single +5V supply, gain of
–8V/V circuit configuration used as a basis for the +5V only
Typical Characteristic curves. In this case, the midpoint DC
bias on the noninverting input is also de-coupled with an
additional 0.1µF decoupling capacitor. This reduces the
source impedance at higher frequencies for the noninverting
input bias current noise. This 2.5V bias on the noninverting
input pin appears on the inverting input pin and, since R
G
is
DC blocked by the input capacitor, will also appear at the
output pin. One advantage to inverting operation is that since
there is no signal swing across the input stage, higher slew
rates and operation to even lower supply voltages are pos-
sible. To retain a 1V
PP
output capability, operation down to a
3V supply is allowed. At a +3V supply, the input common
mode range is 0V. However, for the inverting configuration of
a current feedback amplifier, wideband operation is retained
even with the input stage saturated.
OPA695
+5V
+V
S
DIS
50Ω Load
50Ω
R
G
50Ω
806Ω
806Ω
57.6Ω
0.1µF1000pF
+
6.8µF0.1µF
0.1µF
0.1µF
V
I
50Ω Source
R
F
348Ω
V
O
1000pF
1000pF
OPA695
+5V
+V
S
DIS
50Ω Load
50Ω
R
G
50Ω
806Ω
806Ω
20Ω
0.1µF
0.1µF
0.1µF
V
I
R
F
400Ω
V
O
1000pF
+
6.8µF0.1µF
1000pF
1000pF