Datasheet

OPA694
www.ti.com SBOS319G –SEPTEMBER 2004–REVISED JANUARY 2010
ELECTRICAL CHARACTERISTICS: V
S
= ±5V
Boldface limits are tested at +25°C. At R
F
= 402Ω, R
L
= 100Ω, and G = +2V/V, unless otherwise noted.
OPA694ID, IDBV
MIN/MAX OVER
TYP TEMPERATURE
0°C to
+70°C
(
-40°C to MIN/ TEST
PARAMETER TEST CONDITIONS +25°C +25°C
(2) 3)
+85°C
(3)
UNIT MAX LEVELS
(1)
AC Performance (see Figure 31)
Small-Signal Bandwidth G = +1, V
O
= 0.5V
PP
, R
F
= 430Ω 1500 MHz typ C
G = +2, V
O
= 0.5V
PP
, R
F
= 402Ω 690 350 340 330 MHz min B
G = +5, V
O
= 0.5V
PP
, R
F
= 318Ω 250 200 180 160 MHz min B
G = +10, V
O
= 0.5V
PP
, R
F
= 178Ω 200 150 130 120 MHz min B
Bandwidth for 0.1dB Gain Flatness G = +1, V
O
= 0.5V
PP
, R
F
= 430Ω 90 MHz typ C
Peaking at a Gain of +1 V
O
≤ 0.1V
PP
, R
F
= 430Ω 2 dB typ C
Large-Signal Bandwidth G = +2, V
O
= 2V
PP
675 MHz typ C
Slew Rate G = +2, 2V Step 1700 1300 1275 1250 V/ms min B
Rise Time and Fall Time G = +2, V
O
= 0.2V Step 0.8 ns typ C
Settling Time to 0.01% G = +2, V
O
= 2V Step 20 ns typ C
Settling Time to 0.1% G = +2, V
O
= 2V Step 13 ns typ C
Harmonic Distortion G = +2, f = 5MHz, V
O
= 2V
PP
— — —
xx x 2nd-Harmonic R
L
= 100Ω –68 –63 –62 –61 dBc max B
R
L
≥ 500Ω –92 –87 –85 –83 dBc max B
xx x 3rd-Harmonic R
L
= 100Ω –72 –69 –67 –66 dBc max B
R
L
≥ 500Ω –93 –88 –86 –84 dBc max B
Input Voltage Noise Density f > 1MHz 2.1 2.4 2.8 3.0 nV/√Hz max B
Inverting Input Current Noise Density f > 1MHz 22 24 26 28 pA/√Hz max B
Noninverting Input Current Noise
f > 1MHz 24 26 28 30 pA/√Hz max B
Density
NTSC Differential Gain V
O
- 1.4V
PP
, R
L
= 150Ω 0.03 % max C
V
O
- 1.4V
PP
, R
L
= 37.5Ω 0.05 % max C
NTSC Differential Phase G = +2, V
O
- 1.4V
PP
, R
L
= 150Ω 0.015 ° typ C
V
O
- 1.4V
PP
, R
L
= 37.5Ω 0.16 ° typ C
DC PERFORMANCE
(4)
Open-Loop Transimpedance V
O
= 0V, R
L
= 100Ω 145 90 65 60 kΩ min A
Input Offset Voltage V
CM
= 0V ±0.5 ±3.0 ±3.7 ±4.1 mV max A
Average Input Offset Voltage Drift V
CM
= 0V 12 15 mV/°C max B
Noninverting Input Bias Current V
CM
= 0V ±5 ±20 ±26 ±31 mA max A
Average Input Bias Current Drift V
CM
= 0V ±100 ±150 nA/°C max B
Inverting Input Bias Current V
CM
= 0V ±2 ±18 ±26 ±38 mA max A
Average Input Bias Current Drift V
CM
= 0V ±150 ±200 nA/°C max B
INPUT
Common-mode Input Voltage
(5)
±2.5 ±2.3 ±2.2 ±2.1 V min A
(CMIR)
Common-Mode Rejection Ratio
V
CM
= 0V 60 55 53 51 dB min A
(CMRR)
Noninverting Input Impedance 280 | | 1.2 kΩ | | pF typ C
Inverting Input Resistance Open-Loop 30 Ω typ C
(1) Test levels: (A) 100% tested at +25°C. Over temperature limits by characterization and simulation. (B) Limits set by characterization and
simulation. (C) Typical value only for information.
(2) Junction temperature = ambient for +25°C specifications.
(3) Junction temperature = ambient at low temperature limits; junction temperature = ambient +9°C at high temperature limit for over
temperature specifications.
(4) Current is considered positive out of node. V
CM
is the input common-mode voltage.
(5) Tested < 3dB below minimum specified CMRR at ±CMIR limits.
Copyright © 2004–2010, Texas Instruments Incorporated 3
Product Folder Link(s): OPA694