Datasheet

OPA692
18
SBOS236E
www.ti.com
FIGURE 8. Noise Model.
expected 6dB, while the difference between it and the 3rd
decreases by less than the expected 12dB. This also shows up
in the 2-tone, 3rd-order intermodulation spurious (IM3) response
curves. The 3rd-order spurious levels are extremely low at low
output power levels. The output stage continues to hold them low
even as the fundamental power reaches very high levels. As the
Typical Characteristics show, the spurious intermodulation pow-
ers do not increase as predicted by a traditional intercept model.
As the fundamental power level increases, the dynamic range
does not decrease significantly. For two tones centered at
20MHz, with 10dBm/tone into a matched 50Ω load (i.e., 2V
PP
for
each tone at the load, which requires 8V
PP
for the overall
2-tone envelope at the output pin), the Typical Characteristics
show 58dBc difference between the test-tone power and the 3rd-
order intermodulation spurious levels. This exceptional perfor-
mance improves further when operating at lower frequencies.
NOISE PERFORMANCE
The OPA692 offers an excellent balance between voltage and
current noise terms to achieve low output noise. The inverting
current noise (15pA/
√Hz ) is significantly lower than earlier
solutions while the input voltage noise (1.7nV
√Hz ) is lower
than most unity-gain stable, wideband, voltage-feedback op
amps. This low input voltage noise was achieved at the price
of higher noninverting input current noise (12pA/
√Hz ). As long
as the AC source impedance looking out of the noninverting
node is less than 100Ω, this current noise will not contribute
significantly to the total output noise. The op amp input voltage
noise and the two input current noise terms combine to give
low output noise for the gain settings, available using the
OPA692. Figure 8 shows the op amp noise analysis model
with all the noise terms included. In this model, all noise terms
are taken to be noise voltage or current density terms in either
nV/
√Hz or pA/ √Hz .
The total output spot noise voltage can be computed as the
square root of the sum of all squared output noise voltage
contributors. Equation 2 shows the general form for the output
noise voltage using the terms shown in Figure 8.
(2)
E E I R kTR NG I R kTR NG
O
NI BN
SS
BI F F
=+
( )
+




+
( )
+
2
2
2
2
44
Dividing this expression by the noise gain (NG = (1 + R
F
/R
G
))
will give the equivalent input-referred spot noise voltage at the
noninverting input, as shown in Equation 3.
(3)
E E I R kTR
IR
NG
kTR
NG
NNIBN
SS
BI F F
=+
( )
++






+
2
2
2
4
4
Evaluating these two equations for the OPA692 circuit and
component values (see Figure 1) will give a total output spot
noise voltage of 8.2nV/
√Hz and a total equivalent input spot
noise voltage of 4.1nV/
√Hz . This total input-referred spot
noise voltage is higher than the 1.7nV/
√Hz specification for
the op amp voltage noise alone. This reflects the noise added
to the output by the inverting current noise times the feed-
back resistor.
DC ACCURACY
The OPA692 provides exceptional bandwidth in high gains,
giving fast pulse settling but only moderate DC accuracy. The
Electrical Characteristics show an input offset voltage com-
parable to high-speed voltage-feedback amplifiers. However,
the two input bias currents are somewhat higher and are
unmatched. Bias current cancellation techniques will not
reduce the output DC offset for OPA692. As the two input
bias currents are unrelated in both magnitude and polarity,
matching the source impedance looking out of each input to
reduce their error contribution to the output is ineffective.
Evaluating the configuration of Figure 1, using worst-case
+25°C input offset voltage and the two input bias currents,
gives a worst-case output offset range equal to:
±(NG • V
OS
(max)) + (I
BN
• R
S
/2 • NG) ± (I
BI
• R
F
)
where NG = noninverting signal gain
= ±(2 • 2.5mV) + (35µA • 25Ω • 2) ± (402Ω • 25µA)
= ±5mV + 1.75mV ± 10.05mV
= –13.3mV → +16.80mV
Minimizing the resistance seen by the noninverting input will
give the best DC offset performance.
For significantly improved DC accuracy, consider the preci-
sion buffer circuit (see Figure 7).
DISABLE OPERATION
The OPA692 provides an optional disable feature that may be
used either to reduce system power or to implement a simple
channel multiplexing operation. If the
DIS control pin is left
4kT
R
G
R
G
R
F
R
S
OPA692
I
BI
E
O
I
BN
4kT = 1.6E –20J
at 290°K
E
RS
E
NI
√4kTR
S
√4kTR
F