Datasheet

25kW 110kW
15kW
I
S
Control
-V
S
+V
S
V
DIS
Q1
Time(20ns/div)
OutputVoltage(10mV/div)
30
20
10
0
-10
-20
-30
V (2V/div)
DIS
6
4
2
0
V =0V
I
V
DIS
OutputVoltage
OPA690
SBOS223F –DECEMBER 2001–REVISED FEBRUARY 2010 www.ti.com
DISABLE OPERATION gain of +1, this will show a very high impedance at
the output and exceptional signal isolation. If
The OPA690 provides an optional disable feature that
operating at a gain greater than +1, the total
may be used either to reduce system power or to
feedback network resistance (R
F
+ R
G
) will appear as
implement a simple channel multiplexing operation. If
the impedance looking back into the output, but the
the DIS control pin is left unconnected, the OPA690
circuit will still show very high forward and reverse
will operate normally. To disable, the control pin must
isolation. If configured as an inverting amplifier, the
be asserted LOW. Figure 48 shows a simplified
input and output will be connected through the
internal circuit for the disable control feature.
feedback network resistance (R
F
+ R
G
) and the
isolation will be very poor as a result.
One key parameter in disable operation is the output
glitch when switching in and out of the disabled
mode. Figure 49 shows these glitches for the circuit
of Figure 36 with the input signal at 0V. The glitch
waveform at the output pin is plotted along with the
DIS pin voltage.
The transition edge rate (dV/dt) of the DIS control line
will influence this glitch. For the plot of Figure 49, the
edge rate was reduced until no further reduction in
glitch amplitude was observed. This approximately
1V/ns maximum slew rate may be achieved by
adding a simple RC filter into the DIS pin from a
higher speed logic line. If extremely fast transition
logic is used, a 1kΩ series resistor between the logic
gate and the DIS input pin provides adequate
bandlimiting using just the parasitic input capacitance
Figure 48. Simplified Disable Control Circuit
on the DIS pin while still ensuring adequate logic
level swing.
In normal operation, base current to Q1 is provided
through the 110kΩ resistor, while the emitter current
through the 15kΩ resistor sets up a voltage drop that
is inadequate to turn on the two diodes in Q1's
emitter. As V
DIS
is pulled LOW, additional current is
pulled through the 15kΩ resistor, eventually turning
on those two diodes (≈75µA). At this point, any
further current pulled out of V
DIS
goes through those
diodes holding the emitter-base voltage of Q1 at
approximately 0V. This shuts off the collector current
out of Q1, turning the amplifier off. The supply current
in the disable mode are only those required to
operate the circuit of Figure 48. Additional circuitry
ensures that turn-on time occurs faster than turn-off
time (make-before-break).
Figure 49. Disable/Enable Glitch
When disabled, the output and input nodes go to a
high-impedance state. If the OPA690 is operating at a
24 Copyright © 2001–2010, Texas Instruments Incorporated
Product Folder Link(s): OPA690