Datasheet

OPA657
10
SBOS197E
www.ti.com
APPLICATIONS INFORMATION
WIDEBAND, NON-INVERTING OPERATION
The OPA657 provides a unique combination of low input
voltage noise, very high gain bandwidth, and the DC precision
of a trimmed JFET-input stage to give an exceptional high input
impedance, high gain stage amplifier. Its very high Gain Band-
width Product (GBP) can be used to either deliver high signal
bandwidths at high gains, or to extend the achievable bandwidth
or gain in photodiode-transimpedance applications. To achieve
the full performance of the OPA657, careful attention to printed
circuit board (PCB) layout and component selection is required
as discussed in the following sections of this data sheet.
Figure 1 shows the noninverting gain of +10 circuit used as
the basis for most of the Typical Characteristics. Most of the
curves were characterized using signal sources with 50Ω
driving impedance, and with measurement equipment pre-
senting a 50Ω load impedance. In Figure 1, the 50Ω shunt
resistor at the V
I
terminal matches the source impedance of
the test generator, while the 50Ω series resistor at the V
O
terminal provides a matching resistor for the measurement
equipment load. Generally, data sheet voltage swing speci-
fications are at the output pin (V
O
in Figure 1) while output
power specifications are at the matched 50Ω load. The total
100Ω load at the output combined with the 500Ω total
feedback network load presents the OPA657 with an effec-
tive output load of 83Ω for the circuit of Figure 1.
bandwidth for the OPA657. For lower non-inverting gains than
the minimum recommended gain of +7 for the OPA657,
consider the unity gain stable JFET input OPA656.
WIDEBAND, INVERTING GAIN OPERATION
There can be significant benefits to operating the OPA657 as
an inverting amplifier. This is particularly true when a matched
input impedance is required. Figure 2 shows the inverting
gain circuit used as a starting point for the typical character-
istics showing inverting-mode performance.
Voltage-feedback op amps, unlike current-feedback amplifi-
ers, can use a wide range of resistor values to set their gain.
To retain a controlled frequency response for the noninverting
voltage amplifier of Figure 1, the parallel combination of
R
F
|| R
G
should always < 150Ω. In the noninverting configura-
tion, the parallel combination of R
F
|| R
G
will form a pole with
the parasitic input capacitance at the inverting node of the
OPA657 (including layout parasitics). For best performance,
this pole should be at a frequency greater than the closed-loop
Driving this circuit from a 50Ω source, and constraining the
gain resistor (R
G
) to equal 50Ω will give both a signal
bandwidth and noise advantage. R
G
in this case is acting as
both the input termination resistor and the gain setting
resistor for the circuit. Although the signal gain for the circuit
of Figure 2 is double that for Figure 1, their noise gains are
equal when the 50Ω source resistor is included. This has the
interesting effect of doubling the equivalent GBP for the
amplifier. This can be seen in comparing the G = +10 and
G = –20 small signal frequency response curves. Both show
about 250MHz bandwidth, but the inverting configuration of
Figure 2 is giving 6dB higher signal gain. If the signal source
is actually the low impedance output of another amplifier, R
G
should be increased to the minimum value allowed at the
output of that amplifier and R
F
adjusted to get the desired
gain. It is critical for stable operation of the OPA657 that this
driving amplifier show a very low output impedance through
frequencies exceeding the expected closed-loop bandwidth
for the OPA657.
Figure 2 also shows the noninverting input tied directly to
ground. Often, a bias current canceling resistor to ground is
included here to null out the DC errors caused by the input
bias currents. This is only useful when the input bias currents
are matched. For a JFET part like the OPA657, the input bias
currents do not match but are so low to begin with (< 5pA)
that DC errors due to input bias currents are negligible.
Hence, no resistor is recommended at the noninverting input
for the inverting signal gain condition.
OPA657
+5V
–5V
–V
S
+V
S
50Ω
V
O
V
I
50Ω
+
0.1µF
+
6.8µF
6.8µF
R
G
50Ω
R
F
453Ω
50Ω Source
50Ω Load
0.1µF
OPA657
+5V
–5V
+V
S
–V
S
50ΩV
O
V
I
+
6.8µF0.1µF
+
6.8µF0.1µF
R
F
1kΩ
R
G
50Ω
50Ω Source
50Ω Load
FIGURE 1. Noninverting G = +10 Specifications and Test
Circuit.
FIGURE 2. Inverting G = –20 Specifications and Test Circuit.