Datasheet

150
50
V
IN
Hold Control
27pF
100
820
1
µ
F
620
50
OT A
V
OUT
12
2
3
4
11
10 7
SOTA
SOTA
f
REF
f
IN
C
INT
+5V
V
OUT
f
REF
f
IN
f
OUT
f
OUT
= f
RE F
x N
V
OU T
f
IN
f
REF
I
OU T
V
OU T
75
N
Phase
VCO
OTA
OPA615
75
75
11
10 3
2
12
4
100
7
Hold Control
+V
OUT
50
100
150
100
100
50
+1
OTA
8
4
2
12
3
4
V
OUT
300
50
27pF
27pF
V
IN
10
11
7
BUF602
OPA615
SOTA
OPA615
SBOS299E FEBRUARY 2004REVISED SEPTEMBER 2009......................................................................................................................................
www.ti.com
Integrator for ns-Pulses Phase Detector for Fast PLL Systems
The integrator for ns-pulses using the OPA615 Figure 49 shows the circuit for a phase detector for
(shown in Figure 47) makes use of the fast fast PLL systems. Given a reference pulse train f
REF
comparator and its current-mode output. Placing the and a pulse train input signal f
IN
out of phase, the
hold-control high, a narrow pulse charges the SOTA of the OPA615 acts in this circuit as a
capacitor, increasing the average output voltage. To comparator, either charging or discharging the
minimize ripples at the inverting input and maximize capacitor. This voltage is then buffered by the OTA
the capacitor charge, a T-network is used in the and fed to the VCO.
feedback path.
Figure 47. Integrator for ns-Pulses
Fast Pulse Peak Detector
A circuit similar to that shown in Figure 47 (the
integrator for ns-pulses) can be devised to detect and
isolate positive pulses from negative pulses. This
circuit, shown in Figure 48, uses the OPA615 as well
as the BUF602. This circuit makes use of diodes to
isolate the positive-going pulses from the
negative-going pulses and charge-different
capacitors.
Figure 49. Phase Detector For Fast PLL-Systems
Figure 48. Fast Bipolar Peak Detector
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