Datasheet

"#$
SBOS206E − DECEMBER 2001 − REVISED FEBRUARY 2007
www.ti.com
8
ENABLE/STATUS (E/S) PIN
The Enable/Status Pin provides two unique functions: 1)
output disable by forcing the pin LOW and 2) thermal
shutdown indication by monitoring the voltage level at the
pin. One or both of these functions can be utilized on the
same device. For normal operation (output enabled), the
E/S pin must be pulled HIGH (at least 2V above V−). A
small value capacitor connected between the E/S pin and
V− may be appropriate for noisy applications. To enable
the OPA561 permanently, the E/S pin can be tied to V+
through a 402kΩ pull-up resistor.
Output Disable
The shutdown pin is referenced to the negative supply
(V−). Therefore, shutdown operation is slightly different in
single-supply and dual-supply applications.
In single-supply operation, V− typically equals common
ground. Therefore, the shutdown logic signal and the
OPA561’s shutdown pin are referenced to the same
potential. In this configuration, the logic pin and the
OPA561 enable can simply be tied together. Shutdown
occurs for voltage levels of < 0.8V. The OPA561 is enabled
at logic levels > 2V.
In dual-supply operation, the logic pin is still referenced to
a logic ground. However, the shutdown pin of the OPA561
is still referenced to V−. To shutdown the OPA561, the
voltage level of the logic signal needs to be level shifted
using an optocoupler, as shown in Figure 3.
Optocoupler
4N38
402k
Ω
NOTE: (1) Optional

may be required
to limit leakage current of octocoupler
at high temperatures.
E/S
V+
(a) +5V
(b) HCT or TTL In
HCT or
TTL In
(a) (b)
OPA561
(1)
V
−
Figure 3. Shutdown Configuration for Dual
Supplies
To disable the output, the E/S pin is pulled LOW, no greater
than 0.8V above V−. This function can be used to conserve
power during idle periods. The typical time required to shut
down the output is 50ns. To return the output to an enabled
state, the E/S pin should be pulled to at least 2.0V above
V−. Typically, the output is enabled within 3µs. It should be
noted that pulling the E/S pin HIGH (output enabled) does
not disable the internal thermal shutdown.
Ensuring Microcontroller Compatibility
Not all microcontrollers output the same logic state after
power-up or reset. 8051-type microcontrollers, for
example, output logic HIGH levels on their ports while
other models power up with logic LOW levels after reset.
In configuration (a) as shown in Figure 3, the shutdown
signal is applied on the cathode side of the photodiode
within the optocoupler. A high logic level causes the
OPA561 to be enabled, and a low logic level shuts the
OPA561 down. In configuration (b) of Figure 3, with the
logic signal applied on the anode side, a high level causes
the OPA561 to shutdown and low level enables the op
amp.
OVER-CURRENT FLAG
The OPA561 features an over-current status flag (CLS,
Pin 9) that can be monitored to see if the load exceeds the
current limit. The output signal of the over current limit flag
is compatible to standard logic. The CLS signal is
referenced to V−. A voltage level of less than (V−) + 0.8V
indicates normal operation and a level of greater than (V−)
+ 2 indicates that the OPA561 is in current limit. The flag
is HIGH as long as the output of the OPA561 is in current
limit. At very low signal frequencies, typically < 1kHz, both
the upper (sourcing current) and lower current limit
(sinking current) are monitored. At frequencies > 1kHz,
due to internal circuit limitations, the flag output signal for
the upper current limit becomes delayed and shortened.
The flag signal for the lower current limit is unaffected by
this behavior. As the signal frequency increases further,
only the lower current limit (sinking current) is output on
pin 9.
OUTPUT STAGE COMPENSATION
The complex load impedances common in power op amp
applications can cause output stage instability. For normal
operation, output compensation circuitry is typically not
required. However, if the OPA561 is intended to be driven
into current limit, an R/C network (snubber) may be
required. A snubber circuit may also enhance stability
when driving large capacitive loads (> 1000pF) or
inductive loads (motors, loads separated from the
amplifier by long cables). Typically, 3Ω to 10Ω in series
with 0.01µF to 0.1µF is adequate. Some variations in
circuit value may be required with certain loads.