Datasheet

OPA548
9
SBOS070B
www.ti.com
DDPAK-7
(1)
(Package Designator KTW)
TO220-7
(Package Designator KVT)
NOTE: (1) For improved thermal performance increase footprint area.
See Figure 6, “Thermal Resistance vs Circuit Board Copper Area”.
Mean dimensions in inches. Refer to end of data sheet
or www.ti.com for tolerances and detailed package
drawings.
0.335
0.15
0.05
0.45
0.51
0.105
0.05
0.035
0.04
0.2
0.085
heat dissipation. See Figure 6 for typical thermal resistance
from junction-to-ambient as a function of the copper area.
POWER DISSIPATION
Power dissipation depends on power supply, signal, and load
conditions. For dc signals, power dissipation is equal to
the product of output current times the voltage across the
mounting surface with a mica (or other film) insulator (see
Figure 5). For lowest overall thermal resistance it is best to
isolate the entire heat sink/OPA548 structure from the mount-
ing surface rather than to use an insulator between the
semiconductor and heat sink.
For best thermal performance, the tab of the DDPAK sur-
face-mount version should be soldered directly to a circuit
board copper area. Increasing the copper area improves
13750Ω
R
CL
0.01µF
(optional, for noisy
environments)
3
4
3
4
4.75V
R
CL
= – 13750Ω
OPA547 CURRENT LIMIT: 0 to 5A
NOTE: (1) Resistors are nearest standard 1% values.
DESIRED
CURRENT LIMIT
0A
1A
2.5A
3A
4A
5A
RESISTOR
(1)
(R
CL
)
I
LIM
Open
57.6kΩ
14.7kΩ
10kΩ
4.02kΩ
I
LIM
Connected to V–
CURRENT
(I
SET
)
0µA
67µA
167µA
200µA
267µA
333µA
VOLTAGE
(V
SET
)
(V–) + 4.75V
(V–) + 3.8V
(V–) + 2.5V
(V–) + 2V
(V–) + 1.1V
(V–)
RESISTOR METHOD
15000 (4.75V)
I
LIM
V–
13750Ω
I
SET
= I
LIM
/15000
V
SET
= (V–) + 4.75V – (13750Ω) (I
LIM
)/15000
DAC METHOD (Current or Voltage)
V–
D/A
I
SET
4.75V
±I
LIM
=
Max I
O
= I
LIM
(4.75) (15000)
13750Ω + R
CL
Max I
O
= I
LIM
±I
LIM
=15000 I
SET
FIGURE 3. Adjustable Current Limit.
FIGURE 4. TO-220 and DDPAK Solder Footprints.