Datasheet

P =10V 11.7mA+ 5 /[4 (150 ||1046 )] =165mW´ W( )
D
´ W
2
MaximumT =+85 C+(165mW 80 C/W)=98 C° ´
J
° °
OPA4872
SBOS346C –JUNE 2007–REVISED MARCH 2011 www.ti.com
As a worst-case example, compute the maximum T
J
Again, keep their leads and PCB trace length as short
using an OPA4872ID in the circuit of Figure 27 as possible. Never use wirewound type resistors in a
operating at the maximum specified ambient high-frequency application. Other network
temperature of +85°C with its output driving a components, such as noninverting input termination
grounded 100Ω load to +2.5V: resistors, should also be placed close to the package.
d) Connections to other wideband devices on the
board may be made with short direct traces or
through onboard transmission lines. For short
connections, consider the trace and the input to the
This worst-case condition does not exceed the
next device as a lumped capacitive load. Relatively
maximum junction temperature. Normally, this
wide traces (50mils to 100mils) should be used,
extreme case is not encountered.
preferably with ground and power planes opened up
around them.
BOARD LAYOUT GUIDELINES
Estimate the total capacitive load and set R
S
from the
Achieving optimum performance with a
plot of Figure 5. Low parasitic capacitive loads
high-frequency amplifier such as the OPA4872
(greater than 5pF) may not need an R
S
because the
requires careful attention to board layout parasitics
OPA4872 is nominally compensated to operate with a
and external component types. Recommendations to
2pF parasitic load. If a long trace is required, and the
optimize performance include:
6dB signal loss intrinsic to a doubly-terminated
a) Minimize parasitic capacitance to any ac
transmission line is acceptable, implement a matched
ground for all of the signal I/O pins. Parasitic
impedance transmission line using microstrip or
capacitance on the output pin can cause instability;
stripline techniques (consult an ECL design handbook
on the noninverting input, it can react with the source
for microstrip and stripline layout techniques). A 50Ω
impedance to cause unintentional bandlimiting. To
environment is normally not necessary on the board,
reduce unwanted capacitance, a window around the
and in fact, a higher impedance environment
signal I/O pins should be opened in all of the ground
improves distortion as shown in the Distortion versus
and power planes around those pins. Otherwise,
Load plot; see Figure 7. With a characteristic board
ground and power planes should be unbroken
trace impedance defined based on board material
elsewhere on the board.
and trace dimensions, a matching series resistor into
the trace from the output of the OPA4872 is used as
b) Minimize the distance (< 0.25") from the
well as a terminating shunt resistor at the input of the
power-supply pins to high frequency 0.1μF
destination device. Remember also that the
decoupling capacitors. At the device pins, the
terminating impedance will be the parallel
ground and power plane layout should not be in close
combination of the shunt resistor and the input
proximity to the signal I/O pins. Avoid narrow power
impedance of the destination device; this total
and ground traces to minimize inductance between
effective impedance should be set to match the trace
the pins and the decoupling capacitors. The
impedance. The high output voltage and current
power-supply connections (on pins 9, 11, 13, and 15)
capability of the OPA4872 allows multiple destination
should always be decoupled with these capacitors.
devices to be handled as separate transmission lines,
An optional supply decoupling capacitor across the
each with its own series and shunt terminations. If the
two power supplies (for bipolar operation) improves
6dB attenuation of a doubly-terminated transmission
2nd harmonic distortion performance. Larger (2.2μF
line is unacceptable, a long trace can be
to 6.8μF) decoupling capacitors, effective at lower
series-terminated at the source end only. Treat the
frequency, should also be used on the main supply
trace as a capacitive load in this case and set the
pins. These capacitors may be placed somewhat
series resistor value as shown in Figure 5. This
farther from the device and may be shared among
configuration does not preserve signal integrity as
several devices in the same area of the PCB.
well as a doubly-terminated line. If the input
impedance of the destination device is low, there will
c) Careful selection and placement of external
be some signal attenuation because of the voltage
components will preserve the high-frequency
divider formed by the series output into the
performance of the OPA4872. Resistors should be
terminating impedance.
a very low reactance type. Surface-mount resistors
work best and allow a tighter overall layout. Metal-film
and carbon composition, axially-leaded resistors can
also provide good high-frequency performance.
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