Datasheet

BANDWIDTH VS GAIN:
1/4
OPA4830
50 SourceW
R
F
750W
R
G
374W
2R
T
1.5kW
R
M
57.6W
+5V
2R
T
1.5kW
150W
0.1 Fm 6.8 Fm
+
0.1 Fm
0.1 Fm
+V
S
2
INVERTING AMPLIFIER OPERATION
OPA4830
SBOS350A – DECEMBER 2006 – REVISED MAY 2008 .................................................................................................................................................... www.ti.com
benefits. It also allows the input to be biased at V
S
/2
NONINVERTING OPERATION without any headroom issues. The output voltage can
be independently moved to be within the output
Voltage-feedback op amps exhibit decreasing
voltage range with coupling capacitors, or bias
closed-loop bandwidth as the signal gain is
adjustment resistors.
increased. In theory, this relationship is described by
the gain bandwidth product (GBP) shown in the
Electrical Characteristics . Ideally, dividing GBP by the
noninverting signal gain (also called the noise gain, or
NG) predicts the closed-loop bandwidth. In practice,
this calculation only holds true when the phase
margin approaches 90 ° , as it does in high-gain
configurations. At low gains (increased feedback
factors), most amplifiers exhibit a more complex
response with lower phase margin. The OPA4830 is
compensated to give a slightly peaked response in a
noninverting gain of 2V/V (see Figure 74 ). This
compensation results in a typical gain of +2V/V
bandwidth of 110MHz, far exceeding that predicted
by dividing the 110MHz GBP by 2V/V. Increasing the
gain causes the phase margin to approach 90 ° and
the bandwidth to more closely approach the predicted
value of (GBP/NG). At a gain of +10V/V, the 11MHz
bandwidth illustrated in the Electrical Characteristics
Figure 88. AC-Coupled, G = – 2V/V Example Circuit
agrees with that predicted using the simple formula
and the typical GBP of 110MHz.
In the inverting configuration, three key design
Frequency response in a gain of +2V/V may be
considerations must be noted. The first consideration
modified to achieve exceptional flatness simply by
is that the gain resistor (R
G
) becomes part of the
increasing the noise gain to 3V/V. One way to do this,
signal channel input impedance. If input impedance
without affecting the +2V/V signal gain, is to add a
matching is desired (which is beneficial whenever the
2.55k Ω resistor across the two inputs (see Figure 78 ).
signal is coupled through a cable, twisted pair, long
A similar technique may be used to reduce peaking in
PCB trace, or other transmission line conductor), R
G
unity-gain (voltage follower) applications. For
may be set equal to the required termination value
example, by using a 750 Ω feedback resistor along
and R
F
adjusted to give the desired gain. This
with a 750 Ω resistor across the two op amp inputs,
approach is the simplest and results in optimum
the voltage follower response is similar to the gain of
bandwidth and noise performance.
+2V/V response of Figure 73 . Further reducing the
value of the resistor across the op amp inputs further
However, at low inverting gains, the resulting
dampens the frequency response because of
feedback resistor value can present a significant load
increased noise gain. The OPA4830 exhibits minimal
to the amplifier output. For an inverting gain of 2,
bandwidth reduction going to single-supply (+5V)
setting R
G
to 50 Ω for input matching eliminates the
operation as compared with ± 5V. This minimal
need for R
M
but requires a 100 Ω feedback resistor.
reduction is because the internal bias control circuitry
This configuration has the interesting advantage of
retains nearly constant quiescent current as the total
the noise gain becoming equal to 2 for a 50 Ω source
supply voltage between the supply pins changes.
impedance — the same as the noninverting circuits
considered above. The amplifier output now sees the
100 Ω feedback resistor in parallel with the external
load. In general, the feedback resistor should be
All of the familiar op amp application circuits are
limited to the 200 Ω to 1.5k Ω range. In this case, it is
available with the OPA4830 to the designer. See
preferable to increase both the R
F
and R
G
values, as
Figure 88 for a typical inverting configuration where
shown in Figure 88 , and then achieve the input
the I/O impedances and signal gain from Figure 72
matching impedance with a third resistor (R
M
) to
are retained in an inverting circuit configuration.
ground. The total input impedance becomes the
Inverting operation is one of the more common
parallel combination of R
G
and R
M
.
requirements and offers several performance
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