Datasheet

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SBOS317D − SEPTEMBER 2004 − REVISED AUGUST 2008
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19
+5V
1/4
OPA4820
1/4
OPA4820
800Ω
800Ω
R
S
R
S
16.7dB
Noise Figure
Gain = 8V/V
18dB
200Ω
200Ω
1kΩ
1kΩ
0.1µF
V
CM
C
L
500Ω
500Ω
V
CM
Dual ADC
1of2
Channels
1:2
50Ω
Source
Figure 11. Single-Supply Differential ADC Driver (1 of 2 channels)
V
OUT
402
Ω
335
Ω
Video
Input
75
Ω
75
Ω
75
Ω
Transmission Line
V
OUT
75
Ω
75
Ω
V
OUT
75
Ω
75
Ω
75
Ω
High output current drive capability allows three
back−terminated 75
Ω
transmission lines to be simultaneously driven.
1/4
OPA4820
Figure 12. Video Distribution Amplifier
SINGLE OP AMP DIFFERENTIAL AMPLIFIER
The voltage-feedback architecture of the OPA4820, with
its high common-mode rejection ratio (CMRR), will provide
exceptional performance in differential amplifier configura-
tions. Figure 13 shows a typical configuration. The starting
point for this design is the selection of the R
F
value in the
range of 200Ω to 2kΩ. Lower values reduce the required
R
G
, increasing the load on the V
2
source and on the
OPA4820 output. Higher values increase output noise as
well as the effects of parasitic board and device
capacitances. Following the selection of R
F
, R
G
must be
set to achieve the desired inverting gain for V
2
. Remember
that the bandwidth will be set approximately by the gain
bandwidth product (GBP) divided by the noise gain
(1 + R
F
/R
G
). For accurate differential operation (that is,
good CMRR), the ratio R
2
/R
1
must be set equal to R
F
/R
G
.
+5V
−
5V
R
2
50
Ω
Power−supply decoupling not shown.
V
2
R
1
V
1
R
F
R
G
V
O
=(V
1
−
V
2
)
R
F
R
G
when
=
R
2
R
1
R
F
R
G
1/4
OPA4820
Figure 13. High-Speed, Single Differential
Amplifier