Datasheet
DISTORTION PERFORMANCE
DRIVING CAPACITIVE LOADS
OPA3695
SBOS355A – APRIL 2008 – REVISED SEPTEMBER 2008 ...............................................................................................................................................
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dissipation to < 1W for an output short while
decreasing the available output voltage swing only
The OPA3695 provides good distortion performance
0.5V, for up to 100mA desired load currents. Always
into a 100 Ω load on ± 5V supplies. Relative to
place the 0.1 µ F power-supply decoupling capacitors
alternative solutions, the OPA3695 holds much lower
after these supply-current limiting resistors directly on
distortion at higher frequencies (> 20MHz) than
the device supply pins.
alternative solutions. Generally, until the fundamental
signal reaches very high-frequency or power levels,
the second harmonic dominates the distortion with a
negligible third-harmonic component. Focusing then
One of the most demanding, and yet very common,
on the second harmonic, increasing the load
load conditions for an op amp is capacitive loading.
impedance improves distortion directly. Remember
Often, the capacitive load is the input of an ADC,
that the total load includes the feedback network — in
including additional external capacitance, which may
the noninverting configuration (see Figure 35 ), this
be recommended to improve ADC linearity. A
value is the sum of R
F
+ R
G
, while in the inverting
high-speed, high open-loop gain amplifier such as the
configuration it is only R
F
(see Figure 36 ). Also,
OPA3695 can be very susceptible to decreased
providing an additional supply decoupling capacitor
stability and may give closed-loop response peaking
(0.01 µ F) between the supply pins (for bipolar
when a capacitive load is placed directly on the
operation) improves the second-order distortion
output pin. When the amplifier open-loop output
slightly (3dB to 6dB).
resistance is considered, this capacitive load
introduces an additional pole in the signal path,
The OPA3695 has very low third-order harmonic
resulting in a feedback path zero that can decrease
distortion — especially with high gains. This feature
the phase margin. Several external solutions to this
also produces a high two-tone, third-order
problem have been suggested. When the primary
intermodulation intercept. Two graphs for this
considerations are frequency response flatness,
intercept are given in the in the Typical
pulse response fidelity, and/or distortion, the simplest
Characteristics; one for ± 5V and one for +5V. The
and most effective solution is to isolate the capacitive
curves shown in each graph is defined at the 50 Ω
load from the feedback loop by inserting a series
load when driven through a 50 Ω matching resistor, to
isolation resistor between the amplifier output and the
allow direct comparisons to RF MMIC devices.
capacitive load. The isolation acts to reduce the
phase lag from the capacitive load pole, thus The intercept is used to predict the intermodulation
increasing the phase margin and improving stability. spurious levels for two closely-spaced frequencies. If
the two test frequencies (f
1
and f
2
) are specified in
The Typical Characteristics show a Recommended
terms of average and delta frequency, f
O
= (f
1
+ f
2
)/2
R
S
vs Capacitive Load curve (Figure 33 ) to help the
and Δ f = |f
2
– f
1
|/2, then the two, 3rd-order, close-in
designer pick a value to give < 0.5dB peaking to the
spurious tones appear at f
O
± 3 × Δ f. The difference
load. The resulting frequency response curves show
between two equal test tone power levels and these
a 0.5dB peaked response for several selected
intermodulation spurious power levels is given by
capacitive loads and recommended R
S
combinations.
Δ dBc = 2 × (IM
3
– P
O
), where IM
3
is the intercept
taken from the Typical Characteristics and P
O
is the
Parasitic capacitive loads greater than 2pF can begin
power level in dBm at the 50 Ω load for one of the two
to degrade the performance of the OPA3695. Long
closely-spaced test frequencies. For instance, at
PCB traces, unmatched cables, and connections to
40MHz, the OPA3695 at a gain of +8V/V has an
other amplifier inputs can easily exceed this value.
intercept of 35dBm at a matched 50 Ω load. If the full
Always consider this effect carefully and add the
envelope of the two frequencies must be 2V
PP
at this
recommended series resistor as close as possible to
load, this requires each tone to be 4dBm (1V
PP
). The
the OPA3695 output pin (see the Board Layout
third-order intermodulation spurious tones is then 2 ×
Guidelines section).
(35 – 4) = 62dBc below the test tone power level
The criterion for setting this R
S
resistor is a maximum
( – 79dBm).
bandwidth, flat frequency response at the load
( < 0.5dB peaking). For the OPA3695 operating at a
gain of +2V/V, the frequency response at the output
pin is flat to begin with, allowing relatively small
values of R
S
to be used for low capacitive loads.
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