Datasheet
OPA2890
www.ti.com
SBOS364C –DECEMBER 2007–REVISED DECEMBER 2009
BOARD LAYOUT GUIDELINES
can add a pole and/or zero below 500MHz that can
Achieving optimum performance with a
effect circuit operation. Keep resistor values as low
high-frequency amplifier such as the OPA2890
as possible consistent with load driving
requires careful attention to board layout parasitics
considerations. The 750Ω feedback used in the
and external component types. Recommendations
Electrical Characteristics is a good starting point for
that optimize performance include:
design. Note that a 0Ω feedback resistor is suggested
for the unity-gain follower application.
a) Minimize parasitic capacitance to any ac ground
for all of the signal I/O pins. Parasitic capacitance on
d) Connections to other wideband devices on the
the output and inverting input pins can cause
board may be made with short, direct traces or
instability: on the noninverting input, it can react with
through onboard transmission lines. For short
the source impedance to cause unintentional
connections, consider the trace and the input to the
bandlimiting. To reduce unwanted capacitance, a
next device as a lumped capacitive load. Relatively
window around the signal I/O pins should be opened
wide traces (50mils to 100mils, or 1.27mm to
in all of the ground and power planes around those
2.54mm) should be used, preferably with ground and
pins. Otherwise, ground and power planes should be
power planes opened up around them. Estimate the
unbroken elsewhere on the board.
total capacitive load and set R
S
from the plots of
Figure 15 and Figure 36. Low parasitic capacitive
b) Minimize the distance (< 0.25in, or 6.35mm) from
loads (< 3pF) may not need an R
S
because the
the power-supply pins to high-frequency 0.1μF
OPA2890 is nominally compensated to operate with a
decoupling capacitors. At the device pins, the ground
2pF parasitic load. Higher parasitic capacitive loads
and power-plane layout should not be in close
without an R
S
are allowed as the signal gain
proximity to the signal I/O pins. Avoid narrow power
increases (increasing the unloaded phase margin;
and ground traces to minimize inductance between
see Figure 61). If a long trace is required, and the
the pins and the decoupling capacitors. The
6dB signal loss intrinsic to a doubly-terminated
power-supply connections should always be
transmission line is acceptable, implement a matched
decoupled with these capacitors. An optional supply
impedance transmission line using microstrip or
decoupling capacitor (0.1μF) across the two power
stripline techniques (consult an ECL design handbook
supplies (for bipolar operation) improves
for microstrip and stripline layout techniques). A 50Ω
2nd-harmonic distortion performance. Larger (2.2μF
environment is normally not necessary on board, and
to 6.8μF) decoupling capacitors, effective at lower
in fact, a higher impedance environment improves
frequencies, should also be used on the main supply
distortion as shown in the distortion versus load plots.
pins. These capacitors may be placed somewhat
With a characteristic board trace impedance defined
farther from the device and may be shared among
(based on board material and trace dimensions), a
several devices in the same area of the printed circuit
matching series resistor into the trace from the output
board (PCB).
of the OPA2890 is used as well as a terminating
c) Careful selection and placement of external
shunt resistor at the input of the destination device.
components preserves the high-frequency
Remember also that the terminating impedance is the
performance of the OPA2890. Resistors should be
parallel combination of the shunt resistor and the
a very low reactance type. Surface-mount resistors
input impedance of the destination device; this total
work best and allow a tighter overall layout. Metal film
effective impedance should be set to match the trace
or carbon composition axially-leaded resistors can
impedance.
also provide good high-frequency performance.
e) Socketing a high-speed part such as the
Again, keep the leads and PCB traces as short as
OPA2890 is not recommended. The additional lead
possible. Never use wirewound type resistors in a
length and pin-to-pin capacitance introduced by the
high-frequency application. Because the output pin
socket can create an extremely troublesome parasitic
and inverting input pin are the most sensitive to
network that can make it almost impossible to
parasitic capacitance, always position the feedback
achieve a smooth, stable frequency response. Best
and series output resistor, if any, as close as possible
results are obtained by soldering the OPA2890 onto
to the output pin. Other network components, such as
the board.
noninverting input termination resistors, should also
be placed close to the package. Even with a low
parasitic capacitance shunting the external resistors,
excessively high resistor values can create significant
time constants that can degrade performance. Good
axial metal film or surface-mount resistors have
approximately 0.2pF in shunt with the resistor. For
resistor values > 1.5kΩ, this parasitic capacitance
Copyright © 2007–2009, Texas Instruments Incorporated Submit Documentation Feedback 27
Product Folder Link(s): OPA2890