Datasheet

DESIGN-IN TOOLS
DEMONSTRATION FIXTURES
DRIVING CAPACITIVE LOADS
MACROMODEL AND APPLICATIONS
OPERATING SUGGESTIONS
OUTPUT CURRENT AND VOLTAGES
OPA2832
SBOS327C – FEBRUARY 2005 – REVISED AUGUST 2008 ............................................................................................................................................. www.ti.com
the available output voltage and current will always
be greater than that shown in the over-temperature
specifications, since the output stage junction
temperatures will be higher than the minimum
Two printed circuit boards (PCBs) are available to
specified operating ambient.
assist in the initial evaluation of circuit performance
using the OPA2832 in its two package options. Both To maintain maximum output stage linearity, no
of these are offered free of charge as unpopulated output short-circuit protection is provided. This will not
PCBs, delivered with a user's guide. The summary normally be a problem, since most applications
information for these fixtures is shown in Table 1 . include a series matching resistor at the output that
will limit the internal power dissipation if the output
Table 1. Demonstration Fixtures by Package side of this resistor is shorted to ground. However,
shorting the output pin directly to the adjacent
ORDERING LITERATURE
positive power-supply pin (8-pin packages) will, in
PRODUCT PACKAGE NUMBER NUMBER
most cases, destroy the amplifier. If additional
OPA2832ID SO-8 DEM-OPA-SO-2A SBOU003
short-circuit protection is required, consider a small
OPA2832IDGK MSOP-8 DEM-OPA-MSOP-2A SBOU004
series resistor in the power-supply leads. This will
reduce the available output voltage swing under
The demonstration fixtures can be requested at the
heavy output loads.
Texas Instruments web site (www.ti.com ) through the
OPA2832 product folder.
One of the most demanding and yet very common
SUPPORT
load conditions for an op amp is capacitive loading.
Often, the capacitive load is the input of an
Computer simulation of circuit performance using
ADC — including additional external capacitance which
SPICE is often a quick way to analyze the
may be recommended to improve ADC linearity. A
performance of the OPA2832 and its circuit designs.
high-speed, high open-loop gain amplifier like the
This is particularly true for video and RF amplifier
OPA2832 can be very susceptible to decreased
circuits where parasitic capacitance and inductance
stability and closed-loop response peaking when a
can play a major role on circuit performance. A
capacitive load is placed directly on the output pin.
SPICE model for the OPA2832 is available through
When the primary considerations are frequency
the TI web page (www.ti.com ). The applications
response flatness, pulse response fidelity, and/or
department is also available for design assistance.
distortion, the simplest and most effective solution is
These models predict typical small signal AC,
to isolate the capacitive load from the feedback loop
transient steps, DC performance, and noise under a
by inserting a series isolation resistor between the
wide variety of operating conditions. The models
amplifier output and the capacitive load.
include the noise terms found in the electrical
specifications of the data sheet. These models do not
The Typical Characteristic curves show the
attempt to distinguish between the package types in
recommended R
S
versus capacitive load and the
their small-signal AC performance.
resulting frequency response at the load. Parasitic
capacitive loads greater than 2pF can begin to
degrade the performance of the OPA2832. Long PC
board traces, unmatched cables, and connections to
multiple devices can easily exceed this value. Always
consider this effect carefully, and add the
The OPA2832 provides outstanding output voltage
recommended series resistor as close as possible to
capability. For the +5V supply, under no-load
the output pin (see the Board Layout Guidelines
conditions at +25 ° C, the output voltage typically
section).
swings closer than 90mV to either supply rail.
The criterion for setting this R
S
resistor is a maximum
The minimum specified output voltage and current
bandwidth, flat frequency response at the load. For a
specifications over temperature are set by worst-case
gain of +2, the frequency response at the output pin
simulations at the cold temperature extreme. Only at
is already slightly peaked without the capacitive load,
cold startup will the output current and voltage
requiring relatively high values of R
S
to flatten the
decrease to the numbers shown in the ensured
response at the load. Increasing the noise gain will
tables. As the output transistors deliver power, their
also reduce the peaking (see Figure 24 ).
junction temperatures will increase, decreasing their
V
BE
s (increasing the available output voltage swing)
and increasing their current gains (increasing the
available output current). In steady-state operation,
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