Datasheet
1
2pR
F
C
F
+
GBP
4pR
F
C
D
Ǹ
f
*3dB
+
GBP
2pR
F
C
D
Ǹ
374
Ω
V
O
V
I
+V
S
+5V
1/2
OPA2830
1/2
OPA2830
2.2nF2.2nF
1
µ
F
2.2nF2.2nF
374
Ω
750
Ω
V
S
/2
750
Ω
2k
Ω
2k
Ω
3
0
−
3
−
6
−
9
−
12
Frequency (MHz)
Gain (dB)
0.01 0.1 1 10
1/2
OPA2830
1/2
OPA2830
High−Speed
DAC
V
O
= I
O
R
F
−
V
O
=
−
I
O
R
F
R
F1
R
F2
C
F1
C
F2
GBP
→
Gain Bandwidth
Product (Hz) for the OPA2830
C
D1
C
D2
I
O
−
I
O
2.5k
Ω
2.5k
Ω
2.5k
Ω
+5V
2.5k
Ω
+5V
HIGH-PERFORMANCE DAC
OPA2830
www.ti.com
.................................................................................................................................................. SBOS309D – AUGUST 2004 – REVISED AUGUST 2008
compliance voltage other than ground for operation,
the appropriate voltage level may be applied to the
noninverting input of the OPA2830. The DC gain for
this circuit is equal to R
F
. At high frequencies, the
DAC output capacitance (C
D
in Figure 83 ) will
produce a zero in the noise gain for the OPA2830
that may cause peaking in the closed-loop frequency
response. C
F
is added across R
F
to compensate for
this noise gain peaking. To achieve a flat
transimpedance frequency response, the pole in each
feedback network should be set to:
which will give a cutoff frequency f
– 3dB
of
approximately:
Figure 81. 138kHz, 2nd-Order, High-Pass Filter
Results showing the frequency response for the
circuit of Figure 81 is shown in Figure 82 .
Figure 82. Frequency Response for the Filter of
Figure 81
Figure 83. High-Speed DAC — Differential
Transimpedance Amplifier
TRANSIMPEDANCE AMPLIFIER
High-frequency video Digital-to-Analog Converters
(DACs) can sometimes benefit from a low distortion
output amplifier to retain their SFDR performance into
real-world loads. Figure 83 shows a differential output
drive implementation. The diagram shows the signal
output current(s) connected into the virtual ground
summing junction(s) of the OPA2830, which is set up
as a transimpedance stage or I-V converter. If the
DAC requires that its outputs terminate to a
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