Datasheet
AC-COUPLED OUTPUT VIDEO LINE DRIVER
3
0
−
3
−
6
−
9
−
12
−
15
−
18
−
21
Frequency (Hz)
Normalized Gain (dB)
1 10 10
2
10
3
10
4
10
5
10
6
10
7
10
8
10
9
1/2
OPA2830
325
Ω
528
Ω
78.7
Ω
650
Ω
+5V
845
Ω
1.87k
Ω
V
O
22
µ
F
47
µ
F
75
Ω
Video DAC
75
Ω
Load
OPA2830
SBOS309D – AUGUST 2004 – REVISED AUGUST 2008 ..................................................................................................................................................
www.ti.com
approximately – 20dB, so good supply decoupling is
recommended on the power-supply pin. Figure 75
Low-power and low-cost video line drivers often
shows the frequency response for the circuit of
buffer digital-to-analog converter (DAC) outputs with
Figure 76 . This plot shows the 8Hz low-frequency
a gain of 2 into a doubly-terminated line. Those
high-pass pole and a high-end cutoff at approximately
interfaces typically require a DC blocking capacitor.
100MHz.
For a simple solution, that interface often has used a
very large value blocking capacitor (220 µ F) to limit
tilt, or SAG, across the frames. One approach to
creating a very low high-pass pole location using
much lower capacitor values is shown in Figure 76 .
This circuit gives a voltage gain of 2 at the output pin
with a high-pass pole at 8Hz. Given the 150 Ω load, a
simple blocking capacitor approach would require a
133 µ F value. The two much lower valued capacitors
give this same low-pass pole using this simple SAG
correction circuit of Figure 76 .
The input is shifted slightly positive in Figure 76 using
the voltage divider from the positive supply. This
gives about a 200mV input DC offset that will show
up at the output pin as a 400mV DC offset when the
DAC output is at zero current during the sync tip
portion of the video signal. This acts to hold the
Figure 75. Video Line Driver Response to Matched
output in its linear operating region. This will pass on
Load
any power-supply noise to the output with a gain of
Figure 76. Video Line Driver with SAG Correction
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