Datasheet
ELECTRICAL CHARACTERISTICS: V
S
= +5V
OPA2695
www.ti.com
...................................................................................................................................................... SBOS354A – APRIL 2008 – REVISED AUGUST 2008
Boldface limits are tested at +25 ° C.
At R
F
= 422 Ω , R
L
= 100 Ω to V
S
/2, and G = +8, unless otherwise noted.
OPA2695ID, IRGT
TYP MIN/MAX OVER TEMPERATURE
0 ° C to – 40 ° C to MIN/ TEST
PARAMETER CONDITIONS +25 ° C +25 ° C
(2)
+70 ° C
(3)
+85 ° C
(3)
UNITS MAX LEVEL
(1)
AC PERFORMANCE
Small-signal bandwidth (V
O
= 0.2V
PP
) G = +1V/V, R
F
= 511 Ω 940 MHz typ C
G = +2V/V, R
F
= 487 Ω 700 MHz typ C
G = +8V/V, R
F
= 348 Ω 395 380 330 300 MHz typ B
G = +16V/V, R
F
= 162 Ω 275 MHz typ C
Bandwidth for 0.2dB gain flatness G = +2V/V, V
O
< 0.2V
PP
, R
F
= 487 Ω MHz min B
Peaking at a gain of +1 R
F
= 511 Ω , V
O
< 0.2V
PP
1.0 2.0 2.5 3.0 dB max B
Large-signal bandwidth G = +8V/V, V
O
= 2V
PP
363 MHz typ C
Slew rate G = +8V/V, 2V step 1800 1300 1200 1100 V/ µ s min B
Rise-and-fall time G = +8V/V, V
O
= 2V step 1 ns typ C
Settling time to 0.02% G = +8V/V, V
O
= 2V step 16 ns typ C
Settling time to 0.1% G = +8V/V, V
O
= 2V step 10 ns typ C
Harmonic distortion G = +8V/V, f = 10MHz, V
O
= 2V
PP
2nd harmonic R
L
= 100 Ω to V
S
/2 – 67 – 55 – 55 – 54 dBc max B
R
L
≥ 500 Ω to V
S
/2 – 101 – 64 – 64 – 63 dBc max B
3rd harmonic R
L
= 100 Ω to V
S
/2 – 64 – 62 – 62 – 63 dBc max B
R
L
≥ 500 Ω to V
S
/2 – 92 – 61 – 61 – 60 dBc max B
Input voltage noise f > 1MHz 1.8 2 2.7 2.9 nV/ √ Hz max B
Noninverting input current noise f > 1MHz 18 19 21 22 pA/ √ Hz max B
Inverting input current noise f > 1MHz 22 24 26 27 pA/ √ Hz max B
DC PERFORMANCE
(4)
Open-loop transimpedance Gain (Z
OL
) V
O
= V
S
/2, R
L
= 100 Ω to V
S
/2 70 40 38 36 k Ω min A
Input offset voltage V
CM
= V
S
/2 ± 0.3 ± 3.5 ± 4.0 ± 4.5 mV max A
Average offset voltage drift V
CM
= V
S
/2 ± 10 ± 15 µ V/ ° C max B
Noninverting input bias current V
CM
= V
S
/2 ± 5 ± 40 ± 45 ± 50 µ A max A
Average noninverting input bias current drift V
CM
= V
S
/2 ± 110 ± 170 nA/ ° C max B
Inverting input bias current V
CM
= V
S
/2 ± 10 ± 60 ± 66 ± 70 µ A max A
Average inverting input bias current drift V
CM
= V
S
/2 ± 120 ± 160 nA/ ° C max B
INPUT
Least positive input voltage
(5)
1.7 1.8 1.9 1.9 V max A
Most positive input voltage
(5)
3.3 3.2 3.1 3.1 V min A
Common-mode rejection ratio (CMRR) V
CM
= V
S
/2 54 51 50 50 dB min A
Noninverting input impedance 280 || 1.2 k Ω || pF typ C
Inverting input resistance (R
I
) Open-loop 32 Ω typ C
OUTPUT
Most positive output voltage No load 4.2 4.0 3.9 3.8 V min A
R
L
= 100 Ω load to V
S
/2 4.0 3.9 3.8 3.7 V min A
Least positive output voltage No load 0.8 1.0 1.1 1.2 V max A
R
L
= 100 Ω load to V
S
/2 1.0 1.1 1.2 1.3 V max A
Current output, sourcing V
O
= V
S
/2 +90 +70 +67 +66 mA min A
Current output, sinking V
O
= V
S
/2 – 90 – 70 – 67 – 66 mA min A
Closed-loop output impedance G = +2V/V, f = 100kHz 0.05 Ω typ C
(1) Test levels: (A) 100% tested at +25 ° C. Over temperature limits set by characterization and simulation. (B) Limits set by characterization
and simulation. (C) Typical value only for information.
(2) Junction temperature = ambient for +25 ° C specifications.
(3) Junction temperature = ambient at low temperature limits; junction temperature = ambient +12 ° C at high temperature limit for over
temperature specifications.
(4) Current is considered positive out of pin.
(5) Tested < 3dB below minimum specified CMRR at ± CMIR limits.
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