Datasheet

THERMAL ANALYSIS
P =10V 28.6mA+5 / 4 (100 ||458 ) =362mW´ W )
D
( ´ W
2
MaximumT =+85 C+(0.36W 100 C/W)=121 C° ´
J
° °
BOARD LAYOUT GUIDELINES
OPA2695
www.ti.com ...................................................................................................................................................... SBOS354A – APRIL 2008 – REVISED AUGUST 2008
capacitance, a window around the signal I/O pins
should be opened in all of the ground and power
The OPA2695 does not require external heatsinking
planes around those pins. Otherwise, ground and
for most applications. Maximum desired junction
power planes should be unbroken elsewhere on the
temperature sets the maximum allowed internal
board.
power dissipation as described below. In no case
should the maximum junction temperature be allowed b) Minimize the distance ( < 0.25", or 0.635cm)
to exceed +150 ° C. from the power-supply pins to high-frequency
0.1 µ F decoupling capacitors. At the device pins,
Operating junction temperature (T
J
) is given by T
A
+
the ground and power plane layout should not be in
P
D
× θ
JA
. The total internal power dissipation (P
D
) is
close proximity to the signal I/O pins. Avoid narrow
the sum of quiescent power (P
DQ
) and additional
power and ground traces to minimize inductance
power dissipated in the output stage (P
DL
) to deliver
between the pins and the decoupling capacitors. The
load power. Quiescent power is simply the specified
power-supply connections should always be
no-load supply current times the total supply voltage
decoupled with these capacitors. An optional
across the part. P
DL
depends on the required output
supply-decoupling capacitor across the two power
signal and load. However, for a grounded resistive
supplies (for bipolar operation) improves
load, P
DL
would be at a maximum when the output is
2nd-harmonic distortion performance. Larger (2.2 µ F
fixed at a voltage equal to one-half of either supply
to 6.8 µ F) decoupling capacitors, effective at a lower
voltage (for equal bipolar supplies). Under this
frequency, should also be used on the main supply
condition, P
DL
= V
S
2
/(4 × R
L
), where R
L
includes
pins. These may be placed somewhat farther from
feedback network loading.
the device and may be shared among several
devices in the same area of the PCB.
Note that it is the power in the output stage and not
into the load that determines internal power
c) Careful selection and placement of external
dissipation.
components preserves the high-frequency
performance of the OPA2695. Resistors should be
As an absolute worst-case example, compute the
a very low reactance type. Surface-mount resistors
maximum T
J
using an OPA2695ID (SO package) in
work best and allow a tighter overall layout. Metal-film
the circuit of Figure 68 operating at the maximum
and carbon composition, axially-leaded resistors can
specified ambient temperature of +85 ° C and driving a
also provide good high frequency performance.
grounded 100 Ω load.
Again, keep the leads and PCB trace length as short
as possible. Never use wirewound-type resistors in a
(10)
high frequency application. Because the output pin
and inverting input pin are the most sensitive to
(11)
parasitic capacitance, always position the feedback
and series output resistor, if any, as close as possible
A similar calculation for the device in a QFN package
to the output pin. Other network components, such as
(OPA2695RGT) with a PowerPAD™ thermal
noninverting input termination resistors, should also
connection results in an estimated junction
be placed close to the package. Where double-sided
temperature T
J
= +105 ° C. These maximum operating
component mounting is allowed, place the feedback
junction temperatures are well below most system
resistor directly under the package on the other side
level targets. Most applications are lower because an
of the board between the output and inverting input
absolute worst-case output stage power was
pins. The frequency response is primarily determined
assumed in this calculation.
by the feedback resistor value, as described
previously. Increasing its value reduces the
bandwidth, while decreasing it gives a more peaked
frequency response. The 402 Ω feedback resistor
Achieving optimum performance with a
(used in the Typical Characteristics at a gain of +8 on
high-frequency amplifier such as the OPA2695
± 5V supplies) is a good starting point for design. Note
requires careful attention to board layout parasitics
that a 523 Ω feedback resistor, rather than a direct
and external component types. Recommendations
short, is required for the unity gain follower
that will optimize performance include:
application. A current-feedback op amp requires a
a) Minimize parasitic capacitance to any ac
feedback resistor — even in the unity gain follower
ground for all of the signal I/O pins. Parasitic
configuration — to control stability.
capacitance on the output and inverting input pins
d) Connections to other wideband devices on the
can cause instability; on the noninverting input, it can
board may be made with short direct traces or
react with the source impedance to cause
through onboard transmission lines. For short
unintentional bandlimiting. To reduce unwanted
connections, consider the trace and the input to the
next device as a lumped capacitive load. Relatively
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