Datasheet

OPA2684
18
SBOS239D
www.ti.com
FIGURE 11. Single-Supply Differential ADC Driver.
FIGURE 12. Measured Harmonic Distortion for the Circuit of
Figure 11.
SINGLE-SUPPLY, HIGH GAIN DIFFERENTIAL
ADC DRIVER
Where a very low power differential I/O interface to a mod-
erate performance ADC is required, the circuit of Figure 11
may be considered. The circuit builds on the inverting differ-
ential I/O configuration of Figure 6 by adding the input
transformer and the output low-pass filter. The input trans-
former provides a single-to-differential conversion where the
input signal is still very low power—it also provides a gain of
2 and removes any common-mode signal from the inputs.
This single +5V design sets a midpoint bias from the supply
at each of the noninverting inputs.
This circuit also includes optional 500Ω pull-down resistors at
the output. With a 2.5V DC common-mode operating point
(set by V
CM
), this will add 5mA to ground in the output stage.
This essentially powers up the NPN side of the output stage
significantly reducing distortion. It is important for good 2nd-
order distortion to connect the grounds of these two resistors
at the same point to minimize ground plane current for the
differential output signal. Figure 12 shows the measured
2nd- and 3rd-harmonic distortion for the circuit of Figure 11
with and without the pull-down resistors.
Less than –65dBc distortion is possible through 5MHz with-
out the pull-down current while this extends to 10MHz using
the two 500Ω pull-down resistors.
SYNTHETIC IMPEDANCE DSL LINE DRIVER
The need for very low power DSL line drivers is well sup-
ported by the OPA2684 with its high (> 100mA) output
current, low (< 1.2V) headroom, and low supply current
(3.4mA). To further improve power efficiency, simple differ-
ential line drivers are often modified to produce a portion
of the output impedance through positive feedback. This
reduces the voltage swing loss in the remaining discrete
matching resistor leaving more of the available voltage swing
at the input of the transformer. This typically will allow the
transformer turns ratio to be reduced, reducing the peak
output current required. All of this together can reduce the
power dissipated in the line driver while delivering a low
distortion DSL signal to the line.
1/2
OPA2684
1/2
OPA2684
C
L
0.1µF
800Ω
800Ω
+5V
R
S
R
S
200Ω
200Ω
500Ω
ADC
Optional
Optional
10kΩ
10kΩ
50Ω
Source
14.7dB
Noise Figure
Gain = 8V/V
18.1dB
1:2
V
CM
V
CM
500Ω
–50
–60
–70
–80
–90
Frequency (MHz)
12010
DISTORTION vs FREQUENCY
Distortion (dBc)
2Vp-p Output
3rd-Harmonic
2nd-Harmonic
No Pull-Down
3rd-Harmonic
2nd-Harmonic
5mA/ch Pull-Down
See Figure 13 for an example design for a +12V single-
supply SHDSL4 line driver where only 27% of the output
impedance is implemented with the physical (18.2Ω) output
resistors with the remaining 73% implemented with positive
feedback. This synthetic output impedance circuit feeds back
the transformer input voltage to the opposite inverting nodes.