Datasheet

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SBOS270C − AUGUST 2003 − REVISED AUGUST 2008
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24
R
G
R
F
R
S
E
O
2
Driver
E
RS
E
N
I
N
I
I
√4
kTR
S
√
4kTR
F
R
F
R
S
E
RS
E
N
I
N
I
I
√4
kTR
S
√
4kTR
G
√
4kTR
F
Figure 14. Differential Op Amp Noise Analysis
Model
As a reminder, the differential gain is expressed as:
G
D
+ 1 )
2 R
F
R
G
The output noise voltage can be expressed as shown be-
low:
e
O
2
+ 2 G
D
2
ǒe
N
2
)
ǒ
i
N
R
S
Ǔ
2
) 4kTR
S
Ǔ) 2
ǒ
i
I
R
F
Ǔ
2
) 2
ǒ
4kTR
F
G
D
Ǔ
Ǹ
Dividing this expression by the differential noise gain G
D
=
(1 + 2R
F
/R
G
) gives the equivalent input-referred spot noise
voltage at the noninverting input, as shown in Equation 21.
e
N
+ 2
ǒ
e
N
2
)
ǒ
i
N
R
S
Ǔ
2
) 4kTR
S
Ǔ
) 2
ǒ
i
I
R
F
G
D
Ǔ
2
) 2
ǒ
4kTR
F
G
D
Ǔ
Ǹ
Evaluating this equation for the OPA2674 circuit and com-
ponent values of Figure 5 gives a total output spot noise
voltage of 31.0nV/√Hz and a total equivalent input spot
noise voltage of 3.5nV/√Hz
.
In order to minimize the noise contributed by I
N
, it is recom-
mended to keep the noninverting source impedance as
low as possible.
DC ACCURACY AND OFFSET CONTROL
A current-feedback op amp such as the OPA2674 pro-
vides exceptional bandwidth in high gains, giving fast
pulse settling but only moderate DC accuracy. The Electri-
cal Characteristics show an input offset voltage compara-
ble to high-speed, voltage-feedback amplifiers; however,
the two input bias currents are somewhat higher and are
unmatched. While bias current cancellation techniques
are very effective with most voltage-feedback op amps,
they do not generally reduce the output DC offset for wide-
band current-feedback op amps. Because the two input
bias currents are unrelated in both magnitude and polarity,
matching the input source impedance to reduce error con-
tribution to the output is ineffective. Evaluating the configu-
ration of Figure 1, using worst-case +25°C input offset volt-
age and the two input bias currents, gives a worst-case
output offset range equal to:
V
OS
= ± (NG × V
IO(MAX)
) ± (I
BN
× R
S
/2 × NG) ± (I
BI
× R
F
)
where NG = noninverting signal gain
= ± (4 × 4.5mV) ± (30µA × 25Ω × 4) ± (402Ω × 35µA)
= ±18mV ± 3mV ± 14mV
V
OS
= ±35.0mV (max at 25°C)
POWER CONTROL OPERATION (SO-14 ONLY)
The OPA2674I-14D provides a power control feature that
may be used to reduce system power. The four modes of
operation for this power control feature are full-power,
power cutback, idle state, and power shutdown. These
four operating modes are set through two logic lines A0
and A1. Table 3 shows the different modes of operation.
Table 3. Power Control Mode of Operation
MODE OF
OPERATION
A1 A0
Full-Power
1 1
Power Cutback 1 0
Idle State 0 1
Shutdown 0 0
The full-power mode is used for normal operating condi-
tion. The power cutback mode brings the quiescent power
to 13.5mA. The idle state mode keeps a low output imped-
ance but reduces output power and bandwidth. The shut-
down mode has a high output impedance as well as the
lowest quiescent power (1.0mA).
If the A0 and A1 pins are left unconnected, the
OPA2674I-14D operates normally (full-power).
To change the power mode, the control pins (either A0 or
A1) must be asserted low. This logic control is referenced
to the positive supply, as shown in the simplified circuit of
Figure 15.
(19)
(20)
(21)