Datasheet

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Input and ESD Protection
External
Pin
+V
CC
-V
CC
Internal
Circuitry
OPA2652
SBOS125A – JUNE 2000 – REVISED MAY 2006
of the board between the output and inverting input devices to be handled as separate transmission
pins. Even with a low parasitic capacitance shunting lines, each with respective series and shunt
the external resistors, excessively high resistor terminations. If the 6dB attenuation of a
values can create significant time constants that can doubly-terminated transmission line is unacceptable,
degrade performance. Good axial metal film or a long trace can be series-terminated at the source
surface-mount resistors have approximately 0.2pF in end only. Treat the trace as a capacitive load in this
shunt with the resistor. For resistor values >1.5k Ω , case and set the series resistor value as shown in
this parasitic capacitance can add a pole and/or zero the plot of Recommended R
S
vs Capacitive Load
below 500MHz that can effect circuit operation. Keep (Figure 17 ). This configuration will not preserve
resistor values as low as possible consistent with signal integrity as well as a doubly-terminated line. If
load driving considerations. The 402 Ω feedback the input impedance of the destination device is low,
used in the typical performance specifications is a there will be some signal attenuation due to the
good starting point for design. Note that a 25 Ω voltage divider formed by the series output into the
feedback resistor, rather than a direct short, is terminating impedance.
suggested for the unity gain follower application. This
e) Socketing a high-speed part like the OPA2652
effectively isolates the inverting input capacitance
is not recommended. The additional lead length
from the output pin that would otherwise cause
and pin-to-pin capacitance introduced by the socket
additional peaking in the gain of +1 frequency
can create an extremely troublesome parasitic
response.
network that can make it almost impossible to
d) Connections to other wideband devices on the achieve a smooth, stable frequency response. Best
board may be made with short direct traces or results are obtained by soldering the OPA2652
through onboard transmission lines. For short directly onto the board.
connections, consider the trace and the input to the
next device as a lumped capacitive load. Relatively
wide traces (50mils to 100mils) should be used,
The OPA2652 is built using a very high-speed
preferably with ground and power planes opened up
complementary bipolar process. The internal junction
around them. Estimate the total capacitive load and
breakdown voltages are relatively low for these very
set R
S
from the plot of Recommended R
S
vs
small geometry devices. These breakdowns are
Capacitive Load (Figure 17 ). Low parasitic capacitive
reflected in the Absolute Maximum Ratings table. All
loads (< 5pF) may not need an R
S
since the
device pins are protected with internal ESD
OPA2652 is nominally compensated to operate with
protection diodes to the power supplies as shown in
a 2pF parasitic load. Higher parasitic capacitive
Figure 37 .
loads without an R
S
are allowed as the signal gain
increases (increasing the unloaded phase margin) If
These diodes provide moderate protection to input
a long trace is required, and the 6dB signal loss
overdrive voltages above the supplies as well. The
intrinsic to a doubly-terminated transmission line is
protection diodes can typically support 30mA
acceptable, implement a matched impedance
continuous current. Where higher currents are
transmission line using microstrip or stripline
possible (for example, in systems with ± 15V supply
techniques (consult an ECL design handbook for
parts driving into the OPA2652), current-limiting
microstrip and stripline layout techniques). A 50 Ω
series resistors should be added into the two inputs.
environment is normally not necessary on board, and
Keep these resistor values as low as possible since
in fact, a higher impedance environment will improve
high values degrade both noise performance and
distortion as shown in the distortion versus load
frequency response.
plots. With a characteristic board trace impedance
defined (based on board material and trace
dimensions), a matching series resistor into the trace
from the output of the OPA2652 is used as well as a
terminating shunt resistor at the input of the
destination device. Remember also that the
terminating impedance will be the parallel
combination of the shunt resistor and the input
impedance of the destination device; this total
effective impedance should be set to match the trace
Figure 37. Internal ESD Protection
impedance. The high output voltage and current
capability of the OPA2652 allows multiple destination
17
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