Datasheet

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Output Current and Voltage
Distortion Performance
Driving Capacitive Loads
Noise Performance
OPA2652
SBOS125A – JUNE 2000 – REVISED MAY 2006
error, as a result of the input bias currents, is directly on the output pin. When the amplifier
reduced to (Input Offset Current) • R
F
. If the 50 Ω open-loop output resistance is considered, this
source impedance is DC-coupled in Figure 29 , the capacitive load introduces an additional pole in the
total resistance to ground on the inverting input will signal path that can decrease the phase margin.
be 429 Ω . Combining this in parallel with the Several external solutions to this problem have been
feedback resistor gives 208 Ω , which is close to the suggested. When the primary considerations are
R
B
= 205 Ω used in Figure 29 . To reduce the frequency response flatness, pulse response fidelity,
additional high-frequency noise introduced by this and/or distortion, the simplest and most effective
resistor, it is sometimes bypassed with a capacitor. solution is to isolate the capacitive load from the
As long as R
B
<300 Ω , the capacitor is not required feedback loop by inserting a series isolation resistor
since its total noise contribution is much less than between the amplifier output and the capacitive load.
that of the op amp input noise voltage. This resistor does not eliminate the pole from the
loop response, but rather shifts it and adds a zero at
a higher frequency. The additional zero acts to
cancel the phase lag from the capacitive load pole,
The OPA2652 specifications in the spec table,
thus increasing the phase margin and improving
though familiar in the industry, consider voltage and
stability.
current limits separately. In many applications, it is
the voltage • current, or VI product, that is more The Typical Characteristics show the recommended
relevant to circuit operation. Refer to the Output R
S
versus capacitive load and the resulting
Voltage and Current Limitations plot in the Typical frequency response at the load. Parasitic capacitive
Characteristics. The X and Y axes of this graph show loads greater than 2pF can begin to degrade the
the zero-voltage output current limit and the zero performance of the OPA2652. Long PCB traces,
current output voltage limit, respectively. The four unmatched cables, and connections to multiple
quadrants give a more detailed view of the device devices can easily exceed this value. Always
output drive capabilities, noting that the graph is consider this effect carefully, and add the
bounded by a Safe Operating Area of 1W maximum recommended series resistor as close as possible to
internal power dissipation (500mW for each the OPA2652 output pin (see Board Layout
channel). Superimposing resistor load lines onto the Guidelines ).
plot shows that the OPA2652 can drive ± 2.2V into
50 Ω or ± 2.5V into 100 Ω without exceeding the output
capabilities, or the 1W dissipation boundary line.
The OPA2652 provides good distortion performance
To maintain maximum output stage linearity, no into a 100 Ω load on ± 5V supplies. Increasing the
output short-circuit protection is provided. This load impedance improves distortion directly.
configuration will not normally be a problem since Remember that the total load includes the feedback
most applications include a series matching resistor network; in the noninverting configuration
at the output that limits the internal power dissipation (Figure 28 ), this is sum of R
F
+ R
G
, while in the
if the output side of this resistor is shorted to ground. inverting configuration, it is only R
F
. Also, providing
However, shorting the output pin directly to the an additional supply decoupling capacitor (0.1 µ F)
adjacent positive power supply pin will, in most between the supply pins (for bipolar operation)
cases, destroy the amplifier. Including a small series improves the 2nd-order distortion slightly (3dB to
resistor (5 Ω ) in the power-supply line will protect 6dB).
against this. Always place the 0.1 µ F decoupling
It is also true that increasing the output voltage swing
capacitor directly on the supply pins.
increases harmonic distortion.
One of the most demanding and yet very common
The OPA2652 input-referred voltage noise
load conditions for an op amp is capacitive loading.
(8nV/ √ Hz), and the two input-referred current noise
Often, the capacitive load is the input of an
terms (1.4pA/ √ Hz), combine to give low output noise
analog-to-digital (A/D) converter—including
under a wide variety of operating conditions.
additional external capacitance that may be
Figure 35 shows the op amp noise analysis model
recommended to improve A/D linearity. A high-speed
with all the noise terms included. In this model, all
amplifier such as the OPA2652 can be very
noise terms are taken to be noise voltage or current
susceptible to decreased stability and closed-loop
density terms in either nV/ √ Hz or pA/ √ Hz.
response peaking when a capacitive load is placed
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