Datasheet

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SBOS249H − JUNE 2003 − REVISED AUGUST 2008
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18
SINGLE-SUPPLY ADSL UPSTREAM DRIVER
Figure 6 shows an example of a single-supply ADSL
upstream driver. The dual OPA2613 is configured as a
differential gain stage to provide signal drive to the primary
of the transformer (here, a step-up transformer with a turns
ratio of 1:2). The main advantage of this configuration is
the cancellation of all even harmonic distortion products.
Another important advantage for ADSL is that each
amplifier needs only to swing half of the total output
required driving the load.
R
G
308
Ω
1k
Ω
1k
Ω
1
µ
F
0.1
µ
F
0.1
µ
F
R
M
12.5
Ω
100
Ω
Z
LINE
AFE
2V
PP
Max
Assumed
R
F
1k
Ω
20
Ω
20
Ω
R
F
1k
Ω
1/2
OPA2613
1/2
OPA2613
+12V
1:n
15V
PP
I
P
=150mA
I
P
=150mA
R
M
12.5
Ω
+6.3V
Figure 6. Single-Supply ADSL Upstream Driver
The analog front-end (AFE) signal is AC-coupled to the
driver, and the noninverting input of each amplifier is
biased slightly above the mid-supply voltage (+6.3V in this
case). In addition to providing the proper biasing to the
amplifier, this approach also provides a high-pass filtering
with a corner frequency, set here at 1.6kHz. As the
upstream signal bandwidth starts at 26kHz, this high-pass
filter does not generate any problems and has the
advantage of filtering out unwanted lower frequencies.
The input signal is amplified with a gain set by the following
equation:
G
D
+ 1 )
2 R
F
R
G
With R
F
= 1kΩ and R
G
= 308Ω, the gain for this differential
amplifier is 7.5. This gain boosts the AFE signal, assumed
to be a maximum of 2V
PP
, to a maximum of 15V
PP
.
The two back-termination resistors (12.5Ω each) added at
each input of the transformer make the impedance of the
modem match the impedance of the phone line, and also
provide a means of detecting the received signal for the
receiver. The value of these resistors (R
M
) is a function of
the line impedance and the transformer turns ratio (n),
given by the following equation:
R
M
+
Z
LINE
2n
2
LINE DRIVER HEADROOM MODEL
The first step in a transformer-coupled, twisted-pair driver
design is to compute the peak-to-peak output voltage from
the target specifications. This is done using the following
equations:
P
L
+ 10 log
V
RMS
2
(1mW) R
L
With P
L
power and V
RMS
voltage at the load, and R
L
load
impedance, this gives the following:
V
RMS
+ (1mW) R
L
10
P
L
10
Ǹ
V
P
+ Crest Factor V
RMS
+ CF V
RMS
with V
P
peak voltage at the load and CF Crest Factor.
V
LPP
+ 2 CF V
RMS
with V
LPP
: peak-to-peak voltage at the load.
Consolidating Equations 4 through 7 allows expressing
the required peak-to-peak voltage at the load as a function
of the crest factor, the load impedance, and the power at
the load. Thus,
V
LPP
+ 2 CF (1mW) R
L
10
P
L
10
Ǹ
This V
LPP
is usually computed for a nominal line
impedance and may be taken as a fixed design target.
The next step for the driver is to compute the individual
amplifier output voltage and currents as a function of V
PP
on the line and transformer turns ratio. As the turns ratio
changes, the minimum allowed supply voltage changes
along with it. The peak current in the amplifier output is
given by:
"I
P
+
1
2
2 V
LPP
n
1
4R
M
With V
LPP
as defined in Equation 8, and R
M
as defined in
Equation 4 and shown in Figure 7.
R
M
R
M
V
Lpp
n
V
Lpp
R
L
2V
Lpp
n
V
pp
=
1:n
Figure 7. Driver Peak Output Voltage
(3)
(4)
(5)
(6)
(7)
(8)
(9)
(10)