Datasheet

1
2
3
4
5
6
7
16
15
14
13
12
11
10
OUTD
-IND
+IND
V-
+INC
-INC
OUTC
OUTA
-INA
+INA
V+
+INB
-INB
OUTB
8 9
SHDNC/D
SHDNA/B
A
D
B
C
1
2
3
4
8
7
6
5
V+
OUT B
-IN B
+IN B
OUT A
-IN A
+IN A
V-
A
B
1
2
3
4
5
10
9
8
7
6
V+
VOUTB
-INB
+INB
SHDNB
VOUTA
-INA
+INA
V-
SHDNA
A
B
1
2
3
4
5
6
7
14
13
12
11
10
9
8
OUTD
-IND
+IND
V-
+INC
-INC
OUTC
OUTA
-INA
+INA
V+
+INB
-INB
OUTB
A
D
B
C
1
2
3
6
5
4
V+
SHDN
-IN
VOUT
V-
+IN
OUTA
-INA
+INA
V-
1
2
3
4
V+
OUTB
-INB
+INB
8
7
6
5
Exposed
Thermal
DiePad
on
Underside
1
2
3
5
4
V+
-IN
OUT
V-
+IN
OPA322, OPA322S
OPA2322, OPA2322S
OPA4322, OPA4322S
SBOS538E JANUARY 2011REVISED JUNE 2012
www.ti.com
PIN CONFIGURATIONS
DBV PACKAGE
DRG PACKAGE
(1)(2)
SOT23-5
DFN-8
(TOP VIEW)
(TOP VIEW)
DBV PACKAGE
SOT23-6
(TOP VIEW)
PW PACKAGE
TSSOP-14
(TOP VIEW)
DGS PACKAGE
MSOP-10
(TOP VIEW)
PW PACKAGE
TSSOP-16
(TOP VIEW)
D, DGK PACKAGES
SO-8, MSOP-8
(TOP VIEW)
(1) Connect thermal pad to V–.
(2) Pad size: 2mm × 1.2mm.
6 Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated
Product Folder Link(s): OPA322 OPA322S OPA2322 OPA2322S OPA4322 OPA4322S