Datasheet
1
2
3
5
4
V+
-IN
OUT
V-
+IN
OPA171-Q1
SBOS556A –JUNE 2011–REVISED SEPTEMBER 2012
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
DBV PACKAGE: OPA171-Q1
SOT23-5
(TOP VIEW)
ORDERING INFORMATION
(1)
T
A
ORDERABLE PART NUMBER TOP-SIDE MARKING
–40°C to 125°C OPA171AQDBVRQ1 OULQ
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or visit the
device product folder at www.ti.com.
ABSOLUTE MAXIMUM RATINGS
(1)
Over operating free-air temperature range, unless otherwise noted.
VALUE
MIN MAX UNIT
Supply voltage ±20 V
Voltage (V–) – 0.5 (V+) + 0.5 V
Signal input
terminals
Current ±10 mA
Output short circuit
(2)
Continuous
Operating temperature –55 +150 °C
Storage temperature –65 +150 °C
Junction temperature +150 °C
Human body model (HBM) classification level H2 4 kV
ESD Ratings
Charged device model (CDM) classification level C3A 500 V
Latch-up per JESD78D Class 1
(1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may
degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those specified is not implied.
(2) Short-circuit to ground, one amplifier per package.
THERMAL INFORMATION
OPA171-Q1
THERMAL METRIC
(1)
DBV (SOT-23) UNITS
5 PINS
θ
JA
Junction-to-ambient thermal resistance 277.3
θ
JC(top)
Junction-to-case(top) thermal resistance 193.3
θ
JB
Junction-to-board thermal resistance 121.2
°C/W
ψ
JT
Junction-to-top characterization parameter 51.8
ψ
JB
Junction-to-board characterization parameter 109.5
θ
JC(bottom)
Junction-to-case(bottom) thermal resistance n/a
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
2 Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated
Product Folder Links: OPA171-Q1