Datasheet

50
45
40
35
30
25
20
15
10
5
0
Overshoot(%)
0 100 200 300 400 500 600 700 800 900 1000
CapacitiveLoad(pF)
OPA171
R =
I
10kW
R
OUT
C
L
R
F
=10kW
+18V
-18V
G= 1-
R =0W
OUT
R =25W
OUT
R =50W
OUT
50
45
40
35
30
25
20
15
10
5
0
Overshoot(%)
0 100 200 300 400 500 600 700 800 900 1000
CapacitiveLoad(pF)
+18V
-18V
R
OUT
C
L
OPA171
R
L
G=+1
R =0W
OUT
R =25W
OUT
R =50W
OUT
R =10kW
L
5kW
OPA171
10mAmax
V+
V
IN
V
OUT
I
OVERLOAD
OPA171-Q1
SBOS556A –JUNE 2011–REVISED SEPTEMBER 2012 www.ti.com
CAPACITIVE LOAD AND STABILITY ELECTRICAL OVERSTRESS
The dynamic characteristics of the OPA171-Q1 have Designers often ask questions about the capability of
been optimized for commonly encountered operating an operational amplifier to withstand electrical
conditions. The combination of low closed-loop gain overstress. These questions tend to focus on the
and high capacitive loads decreases the phase device inputs, but may involve the supply voltage pins
margin of the amplifier and can lead to gain peaking or even the output pin. Each of these different pin
or oscillations. As a result, heavier capacitive loads functions have electrical stress limits determined by
must be isolated from the output. The simplest way to the voltage breakdown characteristics of the
achieve this isolation is to add a small resistor (for particular semiconductor fabrication process and
example, R
OUT
equal to 50Ω) in series with the specific circuits connected to the pin. Additionally,
output. Figure 38 and Figure 39 illustrate graphs of internal electrostatic discharge (ESD) protection is
small-signal overshoot versus capacitive load for built into these circuits to protect them from
several values of R
OUT
. Also, refer to Applications accidental ESD events both before and during
Bulletin AB-028 (SBOA015), available for download product assembly.
from the TI website for details of analysis techniques
These ESD protection diodes also provide in-circuit,
and application circuits.
input overdrive protection, as long as the current is
limited to 10mA as stated in the Absolute Maximum
Ratings. Figure 40 shows how a series input resistor
may be added to the driven input to limit the input
current. The added resistor contributes thermal noise
at the amplifier input and its value should be kept to a
minimum in noise-sensitive applications.
Figure 40. Input Current Protection
Figure 38. Small-Signal Overshoot versus
Capacitive Load (100mV Output Step)
An ESD event produces a short duration, high-
voltage pulse that is transformed into a short
duration, high-current pulse as it discharges through
a semiconductor device. The ESD protection circuits
are designed to provide a current path around the
operational amplifier core to prevent it from being
damaged. The energy absorbed by the protection
circuitry is then dissipated as heat.
When the operational amplifier connects into a circuit,
the ESD protection components are intended to
remain inactive and not become involved in the
application circuit operation. However, circumstances
may arise where an applied voltage exceeds the
operating voltage range of a given pin. Should this
condition occur, there is a risk that some of the
internal ESD protection circuits may be biased on,
and conduct current. Any such current flow occurs
Figure 39. Small-Signal Overshoot versus
through ESD cells and rarely involves the absorption
Capacitive Load (100mV Output Step)
device.
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