Datasheet

P =
DMax
T T-
q
Max A
JA
MAXIMUMPOWERDISSIPATION
vsAMBIENTTEMPERATURE
-40 -15 10 856035
AmbientTemperature( C)°
MaximumPowerDissipation(W)
q
JA
=170°C/WforSO-8(D)
q
JA
=58.4°C/WforMSOP-8(DGN)
T
J
=+150°C
NoAirflow
SO-8(D)Package
MSOP-8(DGN)Package
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
OPA1632
SBOS286B DECEMBER 2003REVISED JANUARY 2010
www.ti.com
POWER DISSIPATION AND THERMAL For systems where heat dissipation is more critical,
CONSIDERATIONS the OPA1632 is offered in an MSOP-8 with
PowerPAD. The thermal coefficient for the MSOP
The OPA1632 does not have thermal shutdown
PowerPAD (DGN) package is substantially improved
protection. Take care to assure that the maximum
over the traditional SO package. Maximum power
junction temperature is not exceeded. Excessive
dissipation levels are depicted in Figure 15 for the
junction temperature can degrade performance or
two packages. The data for the DGN package
cause permanent damage. For best performance and
assume a board layout that follows the PowerPAD
reliability, assure that the junction temperature does
layout guidelines.
not exceed +125°C.
The thermal characteristics of the device are dictated
by the package and the circuit board. Maximum
power dissipation for a given package can be
calculated using the following formula:
where:
P
DMax
is the maximum power dissipation in the
amplifier (W)
T
Max
is the absolute maximum junction
temperature (°C)
T
A
is the ambient temperature (°C)
q
JA
= q
JC
+ q
CA
q
JC
is the thermal coefficient from the silicon
junctions to the case (°C/W)
Figure 15. Maximum Power Dissipation vs
q
CA
is the thermal coefficient from the case to
Ambient Temperature
ambient air (°C/W)
space
REVISION HISTORY
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision A (September, 2006) to Revision B Page
Updated document format to align with current standards ................................................................................................... 1
Changed points 1 and 5 of PowerPAD PCB Layout Considerations section ....................................................................... 9
10 Copyright © 2003–2010, Texas Instruments Incorporated
Product Folder Link(s): OPA1632