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MODULATION CURRENT GENERATOR
I
MOD
[A] +
265 V
R
MODSET
[W]
ƪ
1 )
ǒ
24 W
R
MODTC
[W]
) 630 ppm
Ǔ
ǒ
T[
o
C] * T
0
[
o
C]
Ǔ
ƫ
(6)
CONTROL
FAULT DETECTION
ONET4211LD
SLLS688A – NOVEMBER 2005 – REVISED SEPTEMBER 2007
As with any negative-feedback system design, care must be taken to ensure stability of the loop. The loop
bandwidth must not be too high, in order to minimize pattern-dependent jitter. The dominant pole is determined
by the capacitor C
APC
. The recommended value for C
APC
is 200 nF. The capacitance of the monitor photodiode
C
PD
adds another pole to the system, and thus it must be small enough to maintain stability. The recommended
value for this capacitance is C
PD
≤ 50 pF.
The internal APC loop can be disabled by connecting a 100-k Ω resistor from APCSET to VCC and leaving PD
open. In open-loop operation, the laser diode current is set by I
BIASMAX
and I
MODSET
.
The modulation current generator defines the tail current of the modulator, which is sunk from either MOD+ or
MOD – , depending on the data pattern. The modulation current consists of a current I
MOD0
at a reference
temperature T
0
= 60 ° C (set by the resistor R
MODSET
) and a temperature-dependent modulation current defined by
the resistor R
MODTC
. The modulation current can be estimated as follows:
Note that the reference temperature, T
0
, and the temperature compensation set by R
MODTC
vary from part to part.
To reduce the variation, I
MOD
can be calibrated over temperature and set with a microcontroller DAC or digital
potentiometer.
The function of this block is to control the start-up sequence, detect faults, detect tracking failure of the APC loop,
and provide disable control. The laser driver has a controlled start-up sequence which helps prevent transient
glitches from being applied to the laser during power on. At start-up, the laser diode is off, SDOWN is low, and
the APC loop is open. Once V
CC
reaches ~2.8 V, the laser diode bias generator and modulation current
generator circuitry are activated (if DISABLE is low). The slow-start circuitry gradually brings up the current
delivered to the laser diode. From the time when V
CC
reaches ~2.8 V until the modulation current and bias
current reach 95% of their steady state value, is considered the initialization time. If DISABLE is asserted during
power on, the slow-start circuitry does not activate until DISABLE is negated.
The fault detection circuitry monitors the operation of the ONET4211LD. If FLTMODE is set to a low level,
(hard-fault mode) this circuitry disables the bias and modulation circuits and latches the SDOWN output on
detection of a fault. The fault mode is reset by toggling DISABLE (for a minimum time of T
RES
) or by toggling
VCC.
Once DISABLE is toggled, SDOWN is set low and the circuit is re-initialized.
If FLTMODE is set to a high level (soft-fault mode), a fault is indicated at the SDOWN output; however, the bias
and modulation circuits are not disabled. The SDOWN output is reset once the fault-causing condition
disappears. Toggling DISABLE or VCC is not required.
A functional representation of the fault-detection circuitry is shown in Figure 2 .
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