Datasheet

MSP430L092
MSP430C09x
SLAS673 –SEPTEMBER 2010 www.ti.com
Versatile I/O Port P1, P2
The versatile I/O ports P1 and P2 feature device-dependent reset values. The reset values for the MSP430x09x
devices are shown in Table 10.
Table 10. Versatile Port Reset Values
PORT
PxOUT PxDIR PxREN PxSEL0 PxSEL1 RESET PORTS ON COMMENT
NUMBER
P1.0 0 0 0 0 0 PUC yes P1.0, input
P1.1 0 0 0 0 0 PUC yes P1.1, input
P1.2 0 0 0 0 0 PUC yes P1.2, input
P1.3 0 0 0 0 0 PUC yes P1.3, input
P1.4 0 0 0 0 0 PUC yes P1.4, input
P1.5 0 0 0 0 0 PUC yes P1.5, input
P1.6 0 0 0 0 0 PUC yes P1.6, input
P1.7 - - - - - - - -
P2.0 1 0 1 1 1 BOR no JTAG TCK, input, pullup
P2.1 1 0 1 1 1 BOR no JTAG TMS, input, pullup
P2.2 1 0 1 1 1 BOR no JTAG TDI, input, pullup
P2.3 0 1 0 1 1 BOR no JTAG TDO, output, pullup
Peripheral File Map
Table 11. Peripherals
BASE
MODULE NAME REGISTER DESCRIPTION REGISTER OFFSET
ADDRESS
Timer1_A interrupt vector TA1IV 2Eh
Capture/compare register 2 TA1CCR2 16h
Capture/compare register 1 TA1CCR1 14h
Capture/compare register 0 TA1CCR0 12h
Timer1_A3 Timer1_A register TA1R 0380h 10h
Capture/compare control 2 TA1CCTL2 06h
Capture/compare control 1 TA1CCTL1 04h
Capture/compare control 0 TA1CCTL0 02h
Timer1_A control TA1CTL 00h
Timer0_A interrupt vector TA0IV 2Eh
Capture/compare register 2 TA0CCR2 16h
Capture/compare register 1 TA0CCR1 14h
Capture/compare register 0 TA0CCR0 12h
Timer0_A3 Timer1_A register TA0R 0340h 10h
Capture/compare control 2 TA0CCTL2 06h
Capture/compare control 1 TA0CCTL1 04h
Capture/compare control 0 TA0CCTL0 02h
Timer1_A control TA0CTL 00h
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