Datasheet

NSELx
+
-
CxIFG logic
CxOUT
Reference
256mV
REFON
CMPON
MDB and buffer register
CONVON
APVDIV Register
Vcc
4
8
0000
ADC-DAC-SAR-REG
Up-Dn Counter
Run/
Stop
00
2
set
clr
TA0EN
TA0.0
CBSTP
0
1
OSWP
0
1
Aout
OSEL
CLKSEL
A0
A1
A3
A2
V
REF
SMCLK
SLOPE
ODEN
D/A-8
DBON
TBSTP
TA0.1
TA1EN
TA1.0
De-
Glitching
DFSETx
SBSTP
VREFEN
SLOPE
EOCIFG logic
sEOC
0001
0010
0011
0100
0101
0110
0111
1000
PSELx
4
0000
0001
0010
0011
0100
0101
0110
0111
Pre-Scaler
by 1/2/4/8/16/32
CLKDIVx
SAREN
xCLK
xCLK
from AZ-logic
AZ
EN
CT
Start Stop Logic
Clock
Logic
MCLK
VLOCLK
01
10
11
1001
?
SVMIFG logic
R
R
6R
Vcc
MSP430L092
MSP430C09x
www.ti.com SLAS673 –SEPTEMBER 2010
A-Pool
The analog functions pool (A-Pool) provides a series of functions that can be configured to a digital-to-analog
converter (DAC), multichannel analog-to-digital converter (ADC), supply voltage supervisor (SVS), and
comparator. Input voltage dividers and an internal reference source allow a wide range of combined analog
functions.
Figure 3. A-Pool Block Diagram
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