Datasheet

MSP430L092
MSP430C09x
SLAS673 –SEPTEMBER 2010 www.ti.com
Table 7. System Module Interrupt Vector Registers
INTERRUPT VECTOR WORD
INTERRUPT VECTOR OFFSET PRIORITY
REGISTER ADDRESS
No interrupt pending 00h
Brownout (BOR) 02h Highest
SVMBOR (BOR) 04h
RST/NMI (BOR) 06h
DoBOR (BOR) 08h
Security violation (BOR) 0Ah
SYSRSTIV, System Reset DoPOR(POR) 019Eh 0Ch
WDT timeout (PUC) 0Eh
WDT key violation (PUC) 10h
CCS key violation 12h
PMM key violation 14h
Peripheral area fetch (PUC) 16h
Reserved 18h-3Eh Lowest
No interrupt pending 00h
SVMIFG 02h Highest
VMAIFG 04h
SYSSNIV, System NMI 019Ch
JMBINIFG 06h
JMBOUTIFG 08h
Reserved 0Ah-3Eh Lowest
No interrupt pending 00h
NMIFG 02h Highest
SYSUNIV, User NMI OFIFG 019Ah 04h
BERR 06h
Reserved 08h-3Eh Lowest
No interrupt pending 00h
SYSBERRIV, Bus Error 0198h
Reserved 02h-3Eh Lowest
14 Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated