Datasheet

00
01
10
11
0
1
MCLK
CPUOFF
1
Divider
/1/2/4/8/16/32
3
DIVMx
0
1
ACLK
OSCOFF
1
Divider
/1/2/4/8/16/32
3
DIVAx
0
1
SMCLK
SCG1
1
Divider
/1/2/4/8/16/32
3
DIVSx
SELAx
HF – OSC
SCG0
SELMx
LF-OSC
SELSx
00
01
10
11
00
01
10
11
CLKIN
ACLK enable logic
MCLK enable logic
SMCLK enable logic
VLOCLK
1
0
/2
DIVCLK
MSP430L092
MSP430C09x
SLAS673 –SEPTEMBER 2010 www.ti.com
Figure 1. Compact Clock System (CCS) Block Diagram
Watchdog Timer (WDT_A)
The primary function of the watchdog timer (WDT_A) module is to perform a controlled system restart after a
software problem occurs. If the selected time interval expires, a system reset is generated. If the watchdog
function is not needed in an application, the module can be configured as an interval timer and can generate
interrupts at selected time intervals.
Table 6. WDT_A Signal Connections
DEVICE CLOCK SIGNAL MODULE CLOCK SIGNAL
ACLK ACLK
SMCLK SMCLK
LF-OSC-CLK VLOCLK
LF-OSC-CLK X-CLK
Compact System Module (C-SYS)
The Compact SYS module handles many of the system functions within the device. These include power-on
reset and power-up clear handling, NMI source selection and management, reset interrupt vector generators, and
configuration management. It also includes a data exchange mechanism via JTAG called a JTAG mailbox that
can be used in the application.
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