Datasheet

MSP430L092
MSP430C09x
SLAS673 –SEPTEMBER 2010 www.ti.com
Reset Pin Control Register
15 14 13 12 11 10 9 8
r0 r0 r0 r0 r0 r0 r0 r0
7 6 5 4 3 2 1 0
SYSRSTRE SYSRSTUP SYSNMIES SYSNMI
r0 r0 r0 r0 r1 r1 r1 rw-0
SYSRSTRE Indicates resistor present on RST pin
SYSRSTUP Indicates pullup on RST pin
SYSNMIES Indicates NMI edge select
SYSNMI NMI enable on RST/NMI pin
Memory Organization
Table 5. Memory Organization
TYPE MSP430C091 MSP430C092 MSP430L092 MSP430L092 (EMU)
(1)
32 B 32 B 32 B 32 B
Primary interrupt
ROM
vectors
0x0FFE0
(2)
– 0x0FFFF 0x0FFE0
(2)
– 0x0FFFF 0x0FFE0
(2)
– 0x0FFFF 0x0FFE0
(2)
– 0x0FFFF
Secondary RAM
0x01C60 – 0x01C7F
interrupt vectors Lockable
864 B 1888 B ROM not available
Application ROM
ROM
memory
0x0FC80 – 0x0FFDF 0x0F880 – 0x0FFDF
128 B (BC) 128 B (BC) 2016 B (Loader) Config/loading by tool
Boot Code (BC) /
ROM (by TI)
Loader Code
0x0F800 – 0x0F87F 0x0F800 – 0x0F87F 0x0F800 – 0x0FFDF 0x0F800 – 0x0F87F
128B 128B 128 B 128 B
RAM memory RAM
0x02380 – 0x023FF 0x02380 – 0x023FF 0x02380 – 0x023FF 0x02380 – 0x023FF
1792 B 1760 B
LRAM memory
RAM
(lockable)
0x01C80 – 0x0237F 0xF900 – 0xFFDF
96 B 96 B 96 B 128 B
(3)
CRAM memory
RAM
(lockable)
0x01C00 – 0x01C5F 0x01C00 – 0x01C5F 0x01C00 – 0x01C5F 0x0F880 – 0x0F8FF
4 kB 4 kB 4 kB 4 kB
Peripherals Size
0x00000 – 0x00FFF 0x00000 – 0x00FFF 0x00000 – 0x00FFF 0x00000 – 0x00FFF
(1) The MSP430L092 emulates the MSP430C092 device (MSP430C091 emulation via tool and software).
(2) Not the whole interrupt vector range of CSYS is used on MSP430x09x devices (see Table 4).
(3) Resets and interrupt redirections in RAM with alternate interrupt vectors cannot be emulated .
Start-Up Code (SUC)
The MSP430C09x start-up code checks the password and releases control to the application or enables JTAG
on password match, enters LPM4, and waits for a debug session. The behavior of the SUC is described in the
MSP430L092 Loader Code User's Guide (SLAU324).
Loader Code (Loader)
The MSP430L092 loader checks the presence of an external SPI/I2C memory device containing a valid code
signature, loads validated code into the application LRAM, and starts the application. The loader program uses
P1.2 with an external circuit to pump up the voltage required for SPI memory device readout. For complete
description of the features of the loader and its implementation, see the MSP430L092 Loader Code User's Guide
(SLAU324).
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