Datasheet

1
DVCC
2
P1.0/TA0CLK/ACLK/A0/CA0
3
4
5
P1.3/ADC10CLK/CAOUT/VREF-/VEREF-/A3/CA3
6
7
8
P2.0
9
P2.1
10
P2.2
11
P2.3
12
P2.4
13
P2.5
14
15
16
RST/NMI/SBWTDIO
17
TEST/SBWTCK
18
XOUT/P2.7
19
XIN/P2.6/TA0.1
20
DVSS
P1.6/TA0.1/ TDI/TCLKSDO/SCL/A6/CA6/
P1.7/SDI/SDA/CAOUT/A7/CA7/TDO/TDI
P1.1/TA0.0/A1/CA1
P1.2/TA0.1/A2/CA2
P1.4/TA0.2/SMCLK/A4/ CA4/TCKVREF+/VEREF+/
P1.5/TA0.0 A5/CA5/TMS/SCLK/
1
2
3
4
5 6 7 8
9
RST/NMI/SBWTDIO
10
TEST/SBWTCK
11
XOUT/P2.7
12
XIN/P2.6/TA0.1
13
AVSS
14
DVSS
15
AVCC
16
DVCC
P1.0/TA0CLK/ACLK/A0/CA0
P1.3/ADC10CLK/CAOUT/A3/VREF-/VEREF-/CA3
P1.6/TA0.1/SDO/SCL/A6/CA6TDI/TCLK/
P1.7/ /TDO/TDISDI/SDA/CAOUT/A7/CA7
P1.1/TA0.0/A1/CA1
P1.2/TA0.1/A2/CA2
P1.4/SMCLK/A4/VREF+/VEREF+/CA4/TCK
P1.5/TA0.0/SCLK/A5/CA5/TMS
1
DVCC
2
3
4
5
6
7
8
9
10
RST/NMI/SBWTDIO
11
TEST/SBWTCK
12
XOUT/P2.7
13
XIN/P2.6/TA0.1
14
DVSS
P1.0/TA0CLK/ACLK/A0/CA0
P1.3/ADC10CLK/CAOUT/A3/VREF-/VEREF-/CA3
P1.6/TA0.1/SDO/SCL/A6/CA6/TDI/TCLK
P1.7 /CA7/TDO/TDI/SDI/SDA/CAOUT/A7
P1.1/TA0.0/A1/CA1
P1.2/TA0.1/A2/CA2
P1.4/TA0.2/SMCLK/A4/VREF+/VEREF+/CA4/TCK
P1.5/TA0.0/SCLK/A5/CA5/TMS
MSP430G2x52
MSP430G2x12
www.ti.com SLAS722G –DECEMBER 2010–REVISED MAY 2013
DEVICE PINOUTS
PW PACKAGE
(TOP VIEW)
NOTE: ADC10 pin functions are available only on MSP430G2x52.
NOTE: The pulldown resistors of port pins P2.0, P2.1, P2.2, P2.3, P2.4, and P2.5 should be enabled by setting P2REN.x = 1.
RSA PACKAGE
(TOP VIEW)
NOTE: ADC10 pin functions are available only on MSP430G2x52.
NOTE: The pulldown resistors of port pins P2.0, P2.1, P2.2, P2.3, P2.4, and P2.5 should be enabled by setting P2REN.x = 1.
N OR PW PACKAGE
(TOP VIEW)
NOTE: ADC10 pin functions are available only on MSP430G2x52.
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