Datasheet

P2.0/TA1.0
P2.1/TA1.1
P2.2/TA1.1
P2.3/TA1.0
P2.4/TA1.2
P2.5/TA1.2
From Timer
Direction
0: Input
1: Output
To Module
PxOUT.y
DVSS
DVCC
1
TAx.y
TAxCLK
1
0
PxIN.y
EN
D
PxSEL.y
PxREN.y
1
0
PxSEL2.y
1
0
PxSEL.y
1
3
2
1
0
PxSEL2.y
PxIRQ.y
PxIE.y
EN
Set
Q
Interrupt
Edge
Select
PxSEL.y
PxIES.y
PxIFG.y
PxDIR.y
1
0
PxSEL.y
0
MSP430G2x33
MSP430G2x03
www.ti.com SLAS734F –APRIL 2011–REVISED MAY 2013
Port P2 Pin Schematic: P2.0 to P2.5, Input/Output With Schmitt Trigger
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