Datasheet

SDA
SCL
t
HD,DAT
t
SU,DAT
t
HD,STA
t
HIGH
t
LOW
t
BUF
t
HD,STA
t
SU,STA
t
SP
t
SU,STO
MSP430G2x33
MSP430G2x03
www.ti.com SLAS734F –APRIL 2011–REVISED MAY 2013
USCI (I2C Mode)
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 20)
PARAMETER TEST CONDITIONS V
CC
MIN TYP MAX UNIT
f
USCI
USCI input clock frequency SMCLK, duty cycle = 50% ± 10% f
SYSTEM
MHz
f
SCL
SCL clock frequency 3 V 0 400 kHz
f
SCL
≤ 100 kHz 4.0
t
HD,STA
Hold time (repeated) START 3 V µs
f
SCL
> 100 kHz 0.6
f
SCL
≤ 100 kHz 4.7
t
SU,STA
Setup time for a repeated START 3 V µs
f
SCL
> 100 kHz 0.6
t
HD,DAT
Data hold time 3 V 0 ns
t
SU,DAT
Data setup time 3 V 250 ns
t
SU,STO
Setup time for STOP 3 V 4.0 µs
Pulse width of spikes suppressed by
t
SP
3 V 50 100 600 ns
input filter
Figure 20. I2C Mode Timing
Copyright © 2011–2013, Texas Instruments Incorporated Submit Documentation Feedback 33