Datasheet

Basic Clock
System+
RAM
128B
Brownout
Protection
RST/NMI
VCC VSS
MCLK
SMCLK
Watchdog
WDT+
15/16−Bit
Timer_A2
2 CC
Registers
16MHz
CPU
incl. 16
Registers
Emulation
(2BP)
XOUT
JTAG
Interface
Flash
2kB
ACLK
XIN
Port P1
4 I/O
Interrupt
capability,
pull−up/down
resistors
P1.2, P1.5,
P1.6, P1.7
4
MDB
MAB
Spy−Bi Wire
COMP_A+
4 Channel
input MUX
1
4
3
2
5
6
7
8
DVSS
DVCC
TEST/SBWTCK
P1.7/CAOUT/CA7
RST/NMI/SBWTDIO
P1.5/TA0.0/CA5
P1.2/TA0.1/CA2
P1.6/TA0.1/CA6
MSP430G22x0
SLAS753E –JANUARY 2012–REVISED FEBRUARY 2013 www.ti.com
Device Pinout and Functional Block Diagram, MSP430G2210
See Application Information for detailed I/O information.
D PACKAGE
(TOP VIEW)
Figure 1. Device Pinout, MSP430G2210
Figure 2. Functional Block Diagram, MSP430G2210
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