Datasheet
MSP430G22x0
www.ti.com
SLAS753E –JANUARY 2012–REVISED FEBRUARY 2013
Peripherals
Peripherals are connected to the CPU through data, address, and control buses and can be handled using all
instructions. For complete module descriptions, see the MSP430x2xx Family User's Guide (SLAU144).
Oscillator and System Clock
The clock system is supported by the basic clock module that includes support for a 32768-Hz watch crystal
oscillator, an internal very-low-power low-frequency oscillator and an internal digitally-controlled oscillator (DCO).
The basic clock module is designed to meet the requirements of both low system cost and low power
consumption. The internal DCO provides a fast turn-on clock source and stabilizes in less than 1 µs. The basic
clock module provides the following clock signals:
• Auxiliary clock (ACLK), sourced either from a 32768-Hz watch crystal or the internal LF (VLOCLK) oscillator.
• Main clock (MCLK), the system clock used by the CPU.
• Sub-Main clock (SMCLK), the sub-system clock used by the peripheral modules.
NOTE
The LFXT1 oscillator is not available. LFXT1Sx bits of the BCSCTL3 register should be
configured to use VLOCLK (see the MSP430x2xx Family User's Guide (SLAU144)).
Table 10. DCO Calibration Data (Provided From
Factory in Flash Information Memory Segment A)
DCO CALIBRATION
SIZE ADDRESS
FREQUENCY REGISTER
CALBC1_1MHZ byte 010FFh
1 MHz
CALDCO_1MHZ byte 010FEh
CALBC1_8MHZ byte 010FDh
8 MHz
CALDCO_8MHZ byte 010FCh
CALBC1_12MHZ byte 010FBh
12 MHz
CALDCO_12MHZ byte 010FAh
CALBC1_16MHZ byte 010F9h
16 MHz
CALDCO_16MHZ byte 010F8h
Brownout
The brownout circuit is implemented to provide the proper internal reset signal to the device during power on and
power off.
Digital I/O
There are four pins of one 8-bit I/O port implemented—port P1:
• All individual I/O bits are independently programmable.
• Any combination of input, output, and interrupt condition is possible.
• Edge-selectable interrupt input capability for all the four bits of port P1.
• Read/write access to port-control registers is supported by all instructions.
• Each I/O has an individually programmable pullup/pulldown resistor.
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