Datasheet

MSP430G2x53
MSP430G2x13
SLAS735J –APRIL 2011–REVISED MAY 2013 www.ti.com
Timer_A3 (TA0, TA1)
Timer0/1_A3 is a 16-bit timer/counter with three capture/compare registers. Timer_A3 can support multiple
capture/compares, PWM outputs, and interval timing. Timer_A3 also has extensive interrupt capabilities.
Interrupts may be generated from the counter on overflow conditions and from each of the capture/compare
registers.
Table 12. Timer0_A3 Signal Connections
INPUT PIN NUMBER DEVICE MODULE MODULE OUTPUT PIN NUMBER
MODULE
INPUT INPUT OUTPUT
BLOCK
PW20, N20 PW28 RHB32 PW20, N20 PW28 RHB32
SIGNAL NAME SIGNAL
P1.0-2 P1.0-2 P1.0-31 TACLK TACLK
ACLK ACLK
Timer NA
SMCLK SMCLK
PinOsc PinOsc PinOsc TACLK INCLK
P1.1-3 P1.1-3 P1.1-1 TA0.0 CCI0A P1.1-3 P1.1-3 P1.1-1
ACLK CCI0B P1.5-7 P1.5-7 P1.5-5
CCR0 TA0
V
SS
GND P3.4-15 P3.4-14
V
CC
V
CC
P1.2-4 P1.2-4 P1.2-2 TA0.1 CCI1A P1.2-4 P1.2-4 P1.2-2
CAOUT CCI1B P1.6-14 P1.6-22 P1.6-21
CCR1 TA1
V
SS
GND P2.6-19 P2.6-27 P2.6-26
V
CC
V
CC
P3.5-19 P3.5-18
P3.0-9 P3.0-7 TA0.2 CCI2A P3.0-9 P3.0-7
PinOsc PinOsc PinOsc TA0.2 CCI2B P3.6-20 P3.6-19
CCR2 TA2
V
SS
GND
V
CC
V
CC
Table 13. Timer1_A3 Signal Connections
INPUT PIN NUMBER DEVICE MODULE MODULE OUTPUT PIN NUMBER
MODULE
INPUT INPUT OUTPUT
BLOCK
PW20, N20 PW28 RHB32 PW20, N20 PW28 RHB32
SIGNAL NAME SIGNAL
- P3.7-21 P3.7-20 TACLK TACLK
ACLK ACLK
Timer NA
SMCLK SMCLK
- P3.7-21 P3.7-20 TACLK INCLK
P2.0-8 P2.0-10 P2.0-9 TA1.0 CCI0A P2.0-8 P2.0-10 P2.0-9
P2.3-11 P2.3-16 P2.3-12 TA1.0 CCI0B P2.3-11 P2.3-16 P2.3-15
CCR0 TA0
V
SS
GND P3.1-8 P3.1-6
V
CC
V
CC
P2.1-9 P2.1-11 P2.1-10 TA1.1 CCI1A P2.1-9 P2.1-11 P2.1-10
P2.2-10 P2.2-12 P2.2-11 TA1.1 CCI1B P2.2-10 P2.2-12 P2.2-11
CCR1 TA1
V
SS
GND P3.2-13 P3.2-12
V
CC
V
CC
P2.4-12 P2.4-17 P2.4-16 TA1.2 CCI2A P2.4-12 P2.4-17 P2.4-16
P2.5-13 P2.5-18 P2.5-17 TA1.2 CCI2B P2.5-13 P2.5-18 P2.5-17
CCR2 TA2
V
SS
GND P3.3-14 P3.3-13
V
CC
V
CC
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