Datasheet

To Module
From USI
PxOUT.y
DV
SS
DV
CC
1
1
0
PxIN.y
PxREN.y
1
0
PxIRQ.y
PxIE.y
EN
Set
Q
Interrupt
Edge
Select
PxSEL.y
PxIES.y
PxIFG.y
Direction
0: Input
1: Output
PxDIR.y
PxSEL.y
0
1
From JTAG
To JTAG
P1.5/TA0.0/SCLK/TMS
PxSEL.y or
USIPE5
PxSEL.y
From USI
MSP430G2x31
MSP430G2x21
SLAS694J –FEBRUARY 2010–REVISED FEBRUARY 2013 www.ti.com
Port P1 Pin Schematic: P1.5, Input/Output With Schmitt Trigger – MSP430G2x21
Table 15. Port P1 (P1.5) Pin Functions – MSP430G2x21
CONTROL BITS / SIGNALS
(1)
PIN NAME (P1.x) x FUNCTION
P1DIR.x P1SEL.x USIP.x JTAG Mode
P1.5/ P1.x (I/O) I: 0; O: 1 0 0 0
TA0.0/ TA0.0 1 1 0 0
5
SCLK/ SCLK X X 1 0
TMS TMS X X 0 1
(1) X = don't care
34 Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated