Datasheet

MSP430G2x31
MSP430G2x21
SLAS694J –FEBRUARY 2010–REVISED FEBRUARY 2013 www.ti.com
Peripheral File Map
Table 11. Peripherals With Word Access
REGISTER
MODULE REGISTER DESCRIPTION OFFSET
NAME
ADC10 (MSP430G2x31 only) ADC data transfer start address ADC10SA 1BCh
ADC control 0 ADC10CTL0 01B0h
ADC control 1 ADC10CTL0 01B2h
ADC memory ADC10MEM 01B4h
Timer_A Capture/compare register TACCR1 0174h
Capture/compare register TACCR0 0172h
Timer_A register TAR 0170h
Capture/compare control TACCTL1 0164h
Capture/compare control TACCTL0 0162h
Timer_A control TACTL 0160h
Timer_A interrupt vector TAIV 012Eh
Flash Memory Flash control 3 FCTL3 012Ch
Flash control 2 FCTL2 012Ah
Flash control 1 FCTL1 0128h
Watchdog Timer+ Watchdog/timer control WDTCTL 0120h
Table 12. Peripherals With Byte Access
REGISTER
MODULE REGISTER DESCRIPTION OFFSET
NAME
ADC10 (MSP430G2x31 only) ADC analog enable ADC10AE0 04Ah
ADC data transfer control 1 ADC10DTC1 049h
ADC data transfer control 0 ADC10DTC0 048h
USI USI control 0 USICTL0 078h
USI control 1 USICTL1 079h
USI clock control USICKCTL 07Ah
USI bit counter USICNT 07Bh
USI shift register USISR 07Ch
Basic Clock System+ Basic clock system control 3 BCSCTL3 053h
Basic clock system control 2 BCSCTL2 058h
Basic clock system control 1 BCSCTL1 057h
DCO clock frequency control DCOCTL 056h
Port P2 Port P2 resistor enable P2REN 02Fh
Port P2 selection P2SEL 02Eh
Port P2 interrupt enable P2IE 02Dh
Port P2 interrupt edge select P2IES 02Ch
Port P2 interrupt flag P2IFG 02Bh
Port P2 direction P2DIR 02Ah
Port P2 output P2OUT 029h
Port P2 input P2IN 028h
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