Datasheet
MSP430G2x11
MSP430G2x01
www.ti.com
SLAS695I –FEBRUARY 2010–REVISED FEBRUARY 2013
Timer_A2
Timer_A2 is a 16-bit timer/counter with two capture/compare registers. Timer_A2 can support multiple
capture/compares, PWM outputs, and interval timing. Timer_A2 also has extensive interrupt capabilities.
Interrupts may be generated from the counter on overflow conditions and from each of the capture/compare
registers.
Table 10. Timer_A2 Signal Connections - Devices With No Analog
INPUT PIN NUMBER MODULE OUTPUT PIN NUMBER
DEVICE INPUT MODULE MODULE
OUTPUT
SIGNAL INPUT NAME BLOCK
PW, N RSA PW, N RSA
SIGNAL
2 - P1.0 1 - P1.0 TACLK TACLK
ACLK ACLK
Timer NA
SMCLK SMCLK
2 - P1.0 1 - P1.0 TACLK INCLK
3 - P1.1 2 - P1.1 TA0 CCI0A 3 - P1.1 2 - P1.1
ACLK (internal) CCI0B 7 - P1.5 6 - P1.5
CCR0 TA0
V
SS
GND
V
CC
V
CC
4 - P1.2 3 - P1.2 TA1 CCI1A 4 - P1.2 3 - P1.2
TA1 CCI1B 8 - P1.6 7 - P1.6
CCR1 TA1
V
SS
GND 13 - P2.6 12 - P2.6
V
CC
V
CC
Table 11. Timer_A2 Signal Connections - Devices With Comparator_A+
INPUT PIN NUMBER MODULE OUTPUT PIN NUMBER
DEVICE INPUT MODULE MODULE
OUTPUT
SIGNAL INPUT NAME BLOCK
PW, N RSA PW, N RSA
SIGNAL
2 - P1.0 1 - P1.0 TACLK TACLK
ACLK ACLK
Timer NA
SMCLK SMCLK
2 - P1.0 1 - P1.0 TACLK INCLK
3 - P1.1 2 - P1.1 TA0 CCI0A 3 - P1.1 2 - P1.1
ACLK (internal) CCI0B 7 - P1.5 6 - P1.5
CCR0 TA0
V
SS
GND
V
CC
V
CC
4 - P1.2 3 - P1.2 TA1 CCI1A 4 - P1.2 3 - P1.2
CAOUT
CCI1B 8 - P1.6 7 - P1.6
(internal)
CCR1 TA1
V
SS
GND 13 - P2.6 12 - P2.6
V
CC
V
CC
Comparator_A+ (MSP430G2x11 Only)
The primary function of the comparator_A+module is to support precision slope analog-to-digital conversions,
battery-voltage supervision, and monitoring of external analog signals.
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