Datasheet
MSP430FW42x
SLAS383D –OCTOBER 2003–REVISED JANUARY 2011
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Schmitt-Trigger Inputs − Ports (P1, P2, P3, P4, P5, P6), RST/NMI, JTAG (TCK, TMS, TDI/TCLK)
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
V
CC
= 2.2 V 1.1 1.5
V
IT+
Positive-going input threshold voltage V
V
CC
= 3 V 1.5 1.9
V
CC
= 2.2 V 0.4 0.9
V
IT-
Negative-going input threshold voltage V
V
CC
= 3 V 0.9 1.3
V
CC
= 2.2 V 0.3 1.1
V
hys
Input voltage hysteresis (V
IT+
- V
IT-
) V
V
CC
= 3 V 0.45 1
Inputs Px.x, TAx.x
PARAMETER TEST CONDITIONS V
CC
MIN TYP MAX UNIT
2.2 V/3 V 1.5 cycle
Port P1, P2: P1.x to P2.x, external trigger
t
(int)
External interrupt timing 2.2 V 62
signal for the interrupt flag
(1)
ns
3 V 50
2.2 V 62
t
(cap)
Timer_A capture timing TAx x ns
3 V 50
2.2 V 8
Timer_A clock frequency
f
(TAext)
TAxCLK, INCLK t
(H)
= t
(L)
MHz
externally applied to pin
3 V 10
2.2 V 8
f
(TAint)
Timer_A clock frequency SMCLK or ACLK signal selected MHz
3 V 10
(1) The external signal sets the interrupt flag every time the minimum t
(int)
parameters are met. It may be set even with trigger signals
shorter than t
(int)
. Both the cycle and timing specifications must be met to ensure the flag is set. t
(int)
is measured in MCLK cycles.
Leakage Current − Ports (P1, P2, P3, P4, P5, P6)
(1)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
I
lkg(Px.x)
Leakage current Port P1.x Port x: V
(Px.x)
(2)
V
CC
= 2.2 V/3 V ±50 nA
(1) The leakage current is measured with V
SS
or V
CC
applied to the corresponding pin(s), unless otherwise noted.
(2) The port pin must be selected as input.
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