Datasheet

V
CC
(drop) − V
0
0.5
1
1.5
2
0.001 1 1000
V = 3 V
Typical Conditions
1 ns 1 ns
t
pw
− Pulse Width − µs t
pw
− Pulse Width − µs
cc
V
CC
3 V
V
CC(drop)
t
pw
0
1
V
V
CC(start)
V
hys(B_IT−)
V
CC
t
d(BOR)
(B_IT−)
MSP430FW429, MSP430FW428
MSP430FW427, MSP430FW425, MSP430FW423
SLAS383E –OCTOBER 2003–REVISED DECEMBER 2013 www.ti.com
POR, BOR
(1)
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
t
d(BOR)
2000 µs
0.7 ×
V
CC(start)
dV
CC
/dt ≤ 3 V/s (see Figure 10) V
V
(B_IT- )
V
(B_IT-)
Brownout
(2)
dV
CC
/dt ≤ 3 V/s (see Figure 10 through Figure 12) 1.71 V
V
hys(B_IT-)
dV
CC
/dt ≤ 3 V/s (see Figure 10) 70 130 210 mV
Pulse duration needed at RST/NMI pin to accepted
t
(reset)
2 µs
reset internally, V
CC
= 2.2 V, 3 V
(1) The current consumption of the brownout module is already included in the I
CC
current consumption data. The voltage level V
(B_IT-)
+
V
hys(B_IT-)
is ≤ 1.8 V.
(2) During power up, the CPU begins code execution following a period of t
d(BOR)
after V
CC
= V
(B_IT-)
+ V
hys(B_IT-)
. The default FLL+ settings
must not be changed until V
CC
≥ V
CC(min)
, where V
CC(min)
is the minimum supply voltage for the desired operating frequency. See the
MSP430x4xx Family User's Guide (SLAU056) for more information on the brownout and SVS circuit.
Figure 10. POR and BOR vs Supply Voltage
Figure 11. V
CC(drop)
Level with a Square Voltage Drop to Generate a POR/Brownout Signal
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