Datasheet

MSP430FR573x
MSP430FR572x
www.ti.com SLAS639H –JULY 2011–REVISED SEPTEMBER 2013
Table 39. eUSCI_B0 Registers (Base Address: 0640h)
REGISTER DESCRIPTION REGISTER OFFSET
eUSCI_B control word 0 UCB0CTLW0 00h
eUSCI_B control word 1 UCB0CTLW1 02h
eUSCI_B bit rate 0 UCB0BR0 06h
eUSCI_B bit rate 1 UCB0BR1 07h
eUSCI_B status word UCB0STATW 08h
eUSCI_B byte counter threshold UCB0TBCNT 0Ah
eUSCI_B receive buffer UCB0RXBUF 0Ch
eUSCI_B transmit buffer UCB0TXBUF 0Eh
eUSCI_B I2C own address 0 UCB0I2COA0 14h
eUSCI_B I2C own address 1 UCB0I2COA1 16h
eUSCI_B I2C own address 2 UCB0I2COA2 18h
eUSCI_B I2C own address 3 UCB0I2COA3 1Ah
eUSCI_B received address UCB0ADDRX 1Ch
eUSCI_B address mask UCB0ADDMASK 1Eh
eUSCI I2C slave address UCB0I2CSA 20h
eUSCI interrupt enable UCB0IE 2Ah
eUSCI interrupt flags UCB0IFG 2Ch
eUSCI interrupt vector word UCB0IV 2Eh
Table 40. ADC10_B Registers (Base Address: 0700h)
REGISTER DESCRIPTION REGISTER OFFSET
ADC10_B Control register 0 ADC10CTL0 00h
ADC10_B Control register 1 ADC10CTL1 02h
ADC10_B Control register 2 ADC10CTL2 04h
ADC10_B Window Comparator Low Threshold ADC10LO 06h
ADC10_B Window Comparator High Threshold ADC10HI 08h
ADC10_B Memory Control Register 0 ADC10MCTL0 0Ah
ADC10_B Conversion Memory Register ADC10MEM0 12h
ADC10_B Interrupt Enable ADC10IE 1Ah
ADC10_B Interrupt Flags ADC10IGH 1Ch
ADC10_B Interrupt Vector Word ADC10IV 1Eh
Table 41. Comparator_D Registers (Base Address: 08C0h)
REGISTER DESCRIPTION REGISTER OFFSET
Comparator_D control register 0 CDCTL0 00h
Comparator_D control register 1 CDCTL1 02h
Comparator_D control register 2 CDCTL2 04h
Comparator_D control register 3 CDCTL3 06h
Comparator_D interrupt register CDINT 0Ch
Comparator_D interrupt vector word CDIV 0Eh
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