Datasheet

P1.0/TA0.1/DMAE0/RTCCLK/A0/CD0/VeREF-
P1.1/TA0.2/TA1CLK/CDOUT/A1/CD1/VeREF+
P1.2/TA1.1/TA0CLK/CDOUT/A2/CD2
P1SEL0.x
P1DIR.x
P1IN.x
EN
To modules
From module 1
P1OUT.x
1
0
DVSS
DVCC
1
D
To Comparator
From Comparator
Pad Logic
To ADC
From ADC
Bus
Keeper
Direction
0: Input
1: Output
CDPD.x
P1REN.x
0 1
0 0
1 0
1 1
P1SEL1.x
0 1
0 0
1 0
1 1
From module 2
External ADC reference
(P1.0, P1.1)
DVSS
MSP430FR573x
MSP430FR572x
SLAS639H –JULY 2011–REVISED SEPTEMBER 2013 www.ti.com
INPUT/OUTPUT SCHEMATICS
Port P1, P1.0 to P1.2, Input/Output With Schmitt Trigger
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